PDF MB15F72UV Data sheet ( Hoja de datos )

Número de pieza	MB15F72UV
Descripción	Dual Serial Input PLL Frequency Synthesizer
Fabricantes	Fujitsu Media Devices
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No Preview Available ! www.DataSheet4U.com FUJITSU SEMICONDUCTOR DATA SHEET DS04-21375-2E ASSP Dual Serial Input PLL Frequency Synthesizer MB15F72UV s DESCRIPTION The Fujitsu MB15F72UV is a serial input Phase Locked Loop (PLL) frequency synthesizer with a 1300 MHz and a 350 MHz prescalers. A 64/65 or a 128/129 for the 1300 MHz prescaler, and a 8/9 or a 16/17 for the 350 MHz prescaler can be selected for the prescaler that enables pulse swallow operation. The BiCMOS process is used, as a result a supply current is typically 2.5 mA at 2.7 V. The supply voltage range is from 2.4 V to 3.6 V. A refined charge pump supplies well-balanced output current with 1.5 mA and 6 mA selectable by serial data. The data format is the same as the previous one MB15F02SL, MB12F72SP/UL. Fast locking is achieved for adopting the new circuit. MB15F72UV is in the new small package (BCC18) , which decreases a mount area of MB15F72UV about 50% comparing with the former BCC20 (for dual PLL) . MB15F72UV is ideally suited for wireless mobile communications, such as CDMA. s FEATURES • High frequency operation : RF synthesizer : 1300 MHz Max : IF synthesizer : 350 MHz Max • Low power supply voltage : VCC = 2.4 V to 3.6 V • Ultra low power supply current : ICC = 2.5 mA Typ (VCC = 2.7 V, SWIF = SWRF = 0, Ta = +25 °C, in IF, RF locking state) s PACKAGE (Continued) 18-pin plastic BCC (LCC-18P-M05) 1 page www.DataSheet4U.com MB15F72UV s BLOCK DIAGRAM VCCIF GNDIF 54 PSIF 7 Intermittent mode control (IF-PLL) finIF 2 XfinIF 3 Prescaler (IF-PLL) (8/9, 16/17 OSCIN 18 OR finRF 14 XfinRF 13 Prescaler (RF-PLL) (64/65, 128/129) PSRF 9 Intermittent mode control (RF-PLL) 3 bit latch 7 bit latch Binary 7-bit swallow counter (IF-PLL) 11 bit latch Binary 11-bit programmable counter (IF-PLL) fpIF Phase comp. (IF-PLL) Charge pump (IF-PLL) Current Switch 6 DoIF 2 bit latch T1 T2 14 bit latch Binary 14-bit pro- grammable ref. counter(IF-PLL) 1 bit latch C/P setting counter frIF T1 T2 2 bit latch frRF Binary 14-bit pro- grammable ref. counter (RF-PLL)) 14 bit latch C/P setting counter 1 bit latch Lock Det. (IF-PLL) LDIF AND LDRF Lock Det. (RF-PLL) Fast lock Tuning Selector LD frIF frRF fpIF fpRF 8 LD/ fout 3 bit latch Binary 7-bit Binary 11-bit Phase swallow counter programmable comp. (RF-PLL) counter (RF-PLL) (RF-PLL) fpRF 7 bit latch 11 bit latch Charge Current pump (RF-PLL) Switch 10 DoRF LE 15 Schmitt circuit Latch selector Data 16 Clock 17 Schmitt circuit Schmitt circuit CC N N 23-bit shift register 12 1 GND 11 12 VCCRF GNDRF 5 5 Page www.DataSheet4U.com MB15F72UV • Prescaler Data Setting (SW) Divide ratio Prescaler divide ratio IF-PLL Prescaler divide ratio RF-PLL SW = “1” 8/9 64/65 • Charge Pump Current Setting (CS) Current value CS ±6.0 mA 1 ±1.5 mA 0 SW = “0” 16/17 128/129 • LD/fout output Selectable Bit Setting LD/fout pin state LDS 0 LD output 0 0 frIF 1 fout outputs frRF fpIF 1 1 fpRF 1 T1 0 1 1 0 1 0 1 T2 0 0 1 0 0 1 1 • Phase Comparator Phase Switching Data Setting (FCIF, FCRF) Phase comparator input FCIF = “1” FCRF = “1” FCIF = “0” FCRF = “0” DoIF DoRF DoIF DoRF fr > fp H L fr < fp L H fr = fp Z Z Z : High-impedance Depending upon the VCO and LPF polarity, FC bit should be set. High (1) VCO polarity FC = “1” (2) VCO polarity FC = “0” VCO Output Frequency (1) Note : Give attention to the polarity for using active type LPF. LPF Output voltage (2) Max 11 11 Page

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Número de pieza	Descripción	Fabricantes
MB15F72UL	Dual Serial Input PLL Frequency Synthesizer	Fujitsu Media Devices
MB15F72UV	Dual Serial Input PLL Frequency Synthesizer	Fujitsu Media Devices

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