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PDF MB15F02 Data sheet ( Hoja de datos )
| Número de pieza | MB15F02 | |
| Descripción | Dual Serial Input PLL Frequency Synthesizer | |
| Fabricantes | Fujitsu Media Devices | |
| Logotipo |  |
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FUJITSU SEMICONDUCTOR
DATA SHEET
DS04-21341-2E
ASSP
Dual Serial Input
PLL Frequency Synthesizer
MB15F02
s DESCRIPTION
The Fujitsu MB15F02 is a serial input Phase Locked Loop (PLL) frequency synthesizer with a 2.0 GHz and a 500
MHz prescalers. A 64/65 or a 128/129 for the 1.2 GHz prescaler, and a 16/17 or a 32/33 for 500 MHz prescaler
can be selected that enables pulse swallow operation.
The latest BiCMOS process technology is used, resuItantly a supply current is limited as low as 6.0 mA typ. at a
supply voltage of 3.0 V.
Furthermore, a super charger circuit is included to provide a fast tuning as well as low noise performance. As a
result of this, MB15F02 is ideally suitable for digital mobile communications, such as GSM (Global System for
Mobile Communications).
s FEATURES
• High frequency operation RF synthesizer : 1.2 GHz max.
IF synthesizer : 500 MHz max.
• Low power supply voltage: VCC = 2.7 to 3.6V
• Very Low power supply current : ICC = 6.0 mA typ. (VCC = 3 V)
• Power saving function : IPS1 = IPS2 = 0.1 µA typ.
• Serial input 14–bit programmable reference divider: R = 5 to 16,383
• Serial input 18–bit programmable divider consisting of:
- Binary 7–bit swallow counter: 0 to 127
- Binary 11–bit programmable counter: 5 to 2,047
• On–chip high performance charge pump circuit and phase comparator, achieving high–speed lock–up and
low phase noise
• Wide operating temperature: Ta = −40 to 85°C
• Plastic 16-pin SSOP package (FPT-16P-M05) and 16-pin BCC package (LCC-16P-M03)
s PACKAGES
16-pin, Plastic SSOP
16-pin, Plastic BCC
(FPT-16P-M05)
(LCC-16P-M03)
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MB15F02
s ABSOLUTE MAXIMUM RATINGS
Parameter
Power supply voltage
Input voltage
Output voltage
Storage temperature
Symbol
VCC
VI
VO
TSTG
Rating
–0.5 to +4.0
–0.5 to VCC +0.5
–0.5 to VCC +0.5
–55 to +125
Unit Remark
V
V
V
°C
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
s RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Min.
Value
Typ.
Max.
Unit
Note
Power supply voltage
VCC 2.7 3.0 3.6 V
Input voltage
Vi
GND
–
VCC V
Operating temperature
Ta –40 – +85 °C
WARNING: Recommended operating conditions are normal operating ranges for the semiconductor device. All
the device’s electrical characteristics are warranted when operated within these ranges.
Always yse semiconductor devices within the recommended operating conditions. Operation outside
these ranges may adversely affect reliability and could result in device failure.
No warranty is made with repect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representative beforehand.
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s PHASE DETECTOR OUTPUT WAVEFORM
frIF/RF
fpIF/RF
LD
(FC bit = High)
DoIF/RF
Z
tWU
H
(FC bit = Low)
DoIF/RF
Z
tWL
L
MB15F02
LD Output Logic Table
IF–PLL section
RF–PLL section
LD output
Locking state / Power saving state Locking state / Power saving state
Locking state / Power saving state Unlocking state
H
L
Unlocking state
Unlocking state
Locking state / Power saving state
Unlocking state
L
L
Note: • Phase error detection range = −2π to +2π
• Pulses on DoIF/RF signals are output to prevent dead zone.
• LD output becomes low when phase error is tWU or more.
• LD output becomes high when phase error is tWL or less and continues to be so for three cycles or more.
• tWU and tWL depend on OSCin input frequency as follows.
tWU > 8/fosc: i.e. tWU > 625ns when foscin = 12.8 MHz
tWL < 16/fosc: i.e. tWL < 1250ns when foscin = 12.8 MHz
11
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| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet MB15F02.PDF ] | |
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