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PDF MC74VHCT257A Data sheet ( Hoja de datos )
| Número de pieza | MC74VHCT257A | |
| Descripción | Quad 2-Channel Multiplexer with 3-State Outputs | |
| Fabricantes | ON Semiconductor | |
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MC74VHCT257A
Quad 2-Channel Multiplexer
with 3-State Outputs
The MC74VHCT257A is an advanced high speed CMOS quad
2–channel multiplexer fabricated with silicon gate CMOS technology.
It achieves high speed operation similar to equivalent Bipolar
Schottky TTL while maintaining CMOS low power dissipation.
It consists of four 2–input digital multiplexers with common select
(S) and enable (OE) inputs. When (OE) is held High, selection of data
is inhibited and all the outputs go Low.
The select decoding determines whether the A or B inputs get routed
to the corresponding Y outputs.
The VHCT inputs are compatible with TTL levels. This device can be
used as a level converter for interfacing 3.3 V to 5.0 V because it has full
5 V CMOS level output swings.
The VHCT257A input structures provide protection when voltages
between 0 V and 5.5 V are applied, regardless of the supply voltage. The
output structures also provide protection when VCC = 0 V. These input and
output structures help prevent device destruction caused by supply
voltage—input/output voltage mismatch, battery backup, hot insertion, etc.
The internal circuit is composed of three stages, including a buffered
output which provides high noise immunity and stable output. The inputs
tolerate voltages up to 7 V, allowing the interface of 5 V systems to 3 V
systems.
• High Speed: tPD = 4.1ns (Typ) at VCC = 5V
• Low Power Dissipation: ICC = 4µA (Max) at TA = 25°C
• TTL–Compatible Inputs: VIL = 0.8 V; VIH = 2.0 V
• Power Down Protection Provided on Inputs and Outputs
• Balanced Propagation Delays
• Designed for 2V to 5.5V Operating Range
• Low Noise: VOLP = 0.8V (Max)
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300mA
• ESD Performance: HBM > 2000V; Machine Model > 200V
http://onsemi.com
MARKING DIAGRAMS
SO–16
D SUFFIX
CASE 751B
16 9
VHCT257A
AWLYWW
18
TSSOP–16
DT SUFFIX
CASE 948F
16 9
VHCT257A
ALYW
18
EIAJ SO–16
M SUFFIX
CASE 966
16
VHCT257A
ALYW
1
A
L, WL
Y
W, WW
= Assembly Location
= Wafer Lot
= Year
= Work Week
9
8
S1
A0 2
B0 3
Y0 4
A1 5
B1 6
Y1 7
GND 8
16 VCC
15 OE
14 A3
13 B3
12 Y3
11 A2
10 B2
9 Y2
ORDERING INFORMATION
Device
MC74VHCT257AD
Package
SO–16
Shipping
48 Units/Rail
MC74VHCT257ADR2 SO–16 2500 Tape & Reel
MC74VHCT257ADT TSSOP–16 96 Units/Rail
MC74VHCT257ADTR2 TSSOP–16 2500 Tape & Reel
MC74VHCT257AM EIAJ–SO–16 50 Units/Rail
MC74VHCT257AMEL EIAJ–SO–16 2000 Tape & Reel
Figure 1. Pin Assignment
© Semiconductor Components Industries, LLC, 2001
April, 2001 – Rev. 1
DataSheet4 U .com
1
Publication Order Number:
MC74VHCT257A/D
1 page  
www.DataSheet4U.com
MC74VHCT257A
NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50pF, VCC = 5.0V)
Symbol
VOLP
VOLV
VIHD
VILD
Characteristic
Quiet Output Maximum Dynamic VOL
Quiet Output Minimum Dynamic VOL
Minimum High Level Dynamic Input Voltage
Maximum Low Level Dynamic Input Voltage
VCC
A, B or S
50%
GND
tPLH tPHL
Y 50% VCC
OE
Y
Y
TA = 25°C
Typ Max
0.3 0.8
– 0.3
– 0.8
2.0
0.8
Unit
V
V
V
V
50%
tPZL tPLZ
50% VCC
tPZH tPHZ
50% VCC
VCC
GND
HIGH
IMPEDANCE
VOL + 0.3V
VOH - 0.3V
HIGH
IMPEDANCE
Figure 5. Switching Waveform
Figure 6. Switching Waveform
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
CL*
*Includes all probe and jig capacitance
Figure 7. Test Circuit
DEVICE
UNDER
TEST
TEST POINT
OUTPUT 1 kΩ
CL *
CONNECT TO VCC WHEN
TESTING tPLZ AND tPZL.
CONNECT TO GND WHEN
TESTING tPHZ AND tPZH.
*Includes all probe and jig capacitance
Figure 8. Test Circuit
DataSheet4 U .com
INPUT
Figure 9. Input Equivalent Circuit
http://onsemi.com
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