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PDF CY241V08A-05 Data sheet ( Hoja de datos )
| Número de pieza | CY241V08A-05 | |
| Descripción | (CY241V08A-05/-06) MPEG Clock Generator with VCXO | |
| Fabricantes | Cypress Semiconductor | |
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CY241V08A-05,06
MPEG Clock Generator with VCXO
Features
• Integrated phase-locked loop (PLL)
• Low-jitter, high-accuracy outputs
• VCXO with analog adjust
• 3.3V operation
• Compatible with MK3727 (–5, –6)
• Application compatibility for a wide variety of designs
• Enables design compatibility
• Lower drive strength settings (CY241V08A–06)
Benefits
• Digital VCXO control
• Electromagnetic interference (EMI) reduction for standards
compliance
• Second source for existing designs
• Highest-performance PLL tailored for multimedia applica-
tions
• Meets critical timing requirements in complex system
designs
CY241V08A–05,–06 Logic Block Diagram
13.5 XIN
XOUT
OSC
VCXO
QΦ
VCO
P
PLL
VDD VSS
OUTPUT
DIVIDERS
Pin Configurations
CY241V08A–05,–06
8-pin SOIC
XIN
VDD
VCXO
VSS
1
2
3
4
8 XOUT
7 NC or VSS
6 NC or VDD
5 27 MHz
27 MHz
Part
Number
CY241V08A–05
CY241V08A–06
Outputs
Input Frequency Range
Output
VCXO Control
Frequencies
Curve
Other Features
1 13.5-MHz pullable crystal input per 1 copy of 27 MHz non-linear
Cypress specification
Compatible with
MK3727A non linear
VCXO control
1 13.5-MHz pullable crystal input per 1 copy of 27 MHz non-linear
Cypress specification
Same as CY241V08A–05
except lower drive
strength
Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600
Document #: 38-07670 Rev. **
Revised April 09, 2004
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CY241V08A-05,06
Ordering Information
Ordering Code
CY241V08ASC–05,06
CY241V08ASC–05,06T
Package
Name
Package Type
Operating
Range
S8 8-pin SOIC
Commercial
S8 8-pin SOIC - Tape and Reel Commercial
Operating
Voltage
Features
3.3V Linear VCXO control curve
3.3V Linear VCXO control curve
Package Drawing and Dimensions
8-lead (150-Mil) SOIC S8
8 Lead (150 Mil) SOIC - S08
PIN 1 ID
41
0.150[3.810]
0.157[3.987]
0.230[5.842]
0.244[6.197]
1. DIMENSIONS IN INCHES[MM] MIN.
MAX.
2. PIN 1 ID IS OPTIONAL,
ROUND ON SINGLE LEADFRAME
RECTANGULAR ON MATRIX LEADFRAME
3. REFERENCE JEDEC MS-012
4. PACKAGE WEIGHT 0.07gms
58
PART #
S08.15 STANDARD PKG.
SZ08.15 LEAD FREE PKG.
0.189[4.800]
0.196[4.978]
SEATING PLANE
0.010[0.254] X 45°
0.016[0.406]
0.050[1.270]
BSC
0.061[1.549]
0.068[1.727]
0.004[0.102]
0.0098[0.249]
0.0138[0.350]
0.0192[0.487]
0.004[0.102]
0°~8°
0.016[0.406]
0.035[0.889]
0.0075[0.190]
0.0098[0.249]
51-85066-*C
All product or company names mentioned in this document may be the trademarks of their respective holders.
Document #: 38-07670 Rev. **
Page 5 of 6
© Cypress Semiconductor Corporation, 2004. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
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