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PDF MC74LVQ652 Data sheet ( Hoja de datos )
| Número de pieza | MC74LVQ652 | |
| Descripción | LOW-VOLTAGE CMOS OCTAL TRANSCEIVER/ REGISTERED TRANSCEIVER WITH DUAL ENABLE | |
| Fabricantes | Motorola Semiconductors | |
| Logotipo |  |
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Low-Voltage Quiet CMOS
Octal Transceiver/Registered
Transceiver With Dual Enable
(3-State, Non-Inverting)
The MC74LVQ652 is a high performance, non–inverting octal
transceiver/registered transceiver operating from a 2.7 to 3.6V supply.
High impedance TTL compatible inputs significantly reduce current
loading to input drivers while TTL compatible outputs offer improved
switching noise performance. The MC74LVQ652 is suitable for memory
address driving and all TTL level bus oriented transceiver applications.
Data on the A or B bus will be clocked into the registers as the
appropriate clock pin goes from a LOW–to–HIGH logic level. Two Output
Enable pins (OEBA, OEAB) are provided to control the transceiver
outputs. In the transceiver mode, data present at the high impedance port
may be stored in either the A or the B register or in both. The select
controls (SBA, SAB) can multiplex stored and real–time (transparent
mode) data. In the isolation mode (both outputs disabled), A data may be
stored in the B register or B data may be stored in the A register. When in
the real–time mode, it is possible to store data without using the internal
registers by simultaneously enabling OEAB and OEBA. In this
configuration, each output reinforces its input.
• Designed for 2.7 to 3.6V VCC Operation – Ideal for Low Power/Low
Noise Applications
• Guaranteed Simultaneous Switching Noise Level and Dynamic
Threshold Performance
• Guaranteed Skew Specifications
• Guaranteed Incident Wave Switching into 75Ω
• Low Static Supply Current (10µA) Substantially Reduces System Power
Requirements
• Latchup Performance Exceeds 500mA
• ESD Performance: Human Body Model >2000V
VCC CBA SBA OEBA B0 B1 B2 B3 B4 B5 B6 B7
24 23 22 21 20 19 18 17 16 15 14 13
Pinout: 24–Lead Package (Top View)
MC74LVQ652
LVQ
LOW–VOLTAGE CMOS
OCTAL TRANSCEIVER/
REGISTERED TRANSCEIVER
WITH DUAL ENABLE
24
1
24
1
24
1
DW SUFFIX
PLASTIC SOIC
CASE 751E–04
SD SUFFIX
PLASTIC SSOP
CASE 940D–03
DT SUFFIX
PLASTIC TSSOP
CASE 948H–01
PIN NAMES
Pins
A0–A7
B0–B7
CAB, CBA
SAB, SBA
OEBA, OEAB
Function
Side A Inputs/Outputs
Side B Inputs/Outputs
Clock Pulse Inputs
Select Control Inputs
Output Enable Inputs
1 2 3 4 5 6 7 8 9 10 11 12
CAB SAB OEAB A0 A1 A2 A3 A4 A5 A6 A7 GND
12/95
© Motorola, Inc. 1995
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MC74LVQ652
DYNAMIC SWITCHING CHARACTERISTICS (VCC = 3.3V)
Symbol
Characteristic
Condition
TA = +25°C
Min Typ Max
Unit
VOLP
VOLV
VIHD
Dynamic LOW Peak Voltage (Note 1)
Dynamic LOW Valley Voltage (Note 1)
High Level Dynamic Input Voltage
(Note 2)
CL = 50pF, VIH = 3.3V, VIL = 0V
CL = 50pF, VIH = 3.3V, VIL = 0V
Input–Under–Test Switching 0V to Threshold,
f=1MHz
0.6 1.0
–0.5 –1.0
1.5 2.0
V
V
V
VILD
Low Level Dynamic Input Voltage
(Note 2)
Input–Under–Test Switching 3.3V to Threshold,
f=1MHz
1.5 0.8
V
1. Number of outputs defined as “n”. Measured with “n–1” outputs switching from HIGH–to–LOW. The remaining output is measured in the
LOW state.
2. Number of data inputs is defined as “n” switching, “n–1” inputs switching 0V to 3.3V.
AC CHARACTERISTICS1 (tR = tF = 2.5ns; CL = 50pF; RL = 500Ω)
Limits
Symbol
Parameter
TA = +25°C
VCC = 3.0V to 3.6V
VCC = 2.7V
Min Typ Max Min Typ Max
TA = –40°C to +85°C
VCC = 3.0V to 3.6V VCC = 2.7V
Min Max
Max
Unit
fmax
Clock Pulse Frequency
150
150 MHz
tPLH
tPHL
Propagation Delay
Clock to Output
2.5 13.0 16.0 2.5 15.0 18.0
2.5
18.0
19.0
ns
2.5 11.0 14.0 2.5 13.5 16.5
2.5
16.0
18.5
tPLH
tPHL
Propagation Delay
Input to Output
2.5 9.0 12.0 2.5 11.0 14.0
2.5
13.5
16.0
ns
2.5 10.0 13.0 2.5 12.0 14.5
2.5
13.5
16.0
tPLH
tPHL
Propagation Delay
Select to Output
2.5 10.0 13.0 2.5 12.0 15.0
2.5
14.0
16.0
ns
2.5 10.0 13.0 2.5 10.0 13.0
2.5
14.0
15.0
tPZH
tPZL
Output Enable Time to
High and Low Level
1.5 10.5 13.5 1.5 13.0 15.0
1.5
14.0
16.5
ns
1.5 11.0 13.5 1.5 12.0 14.5
1.5
14.5
16.0
tPHZ
Output Disable Time From
1.5 11.0 13.5 1.5 12.0 15.0
1.5
14.5
16.0
ns
tPLZ
High and Low Level
1.5 10.0 13.0 1.5 11.5 14.0
1.5
14.5
16.0
tOSHL
tOSLH
Output–to–Output Skew
(Note 2)
1.0
1.0
1.0 ns
1.0
1. These AC parameters are preliminary and may be modified prior to release. The maximum AC limits are design targets. Actual performance
will be specified upon completion of characterization.
2. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH–to–LOW (tOSHL) or LOW–to–HIGH (tOSLH); parameter
guaranteed by design.
AC OPERATING REQUIREMENTS (tR = tF = 2.5ns; CL = 50pF; RL = 500Ω)
Limits
Symbol
Parameter
TA = +25°C
VCC = 3.0V to 3.6V VCC = 2.7V
Min Min
TA = –40°C to +85°C
VCC = 3.0V to 3.6V VCC = 2.7V
Min Min
ts
Setup TIme, HIGH or LOW Dn to LE
2.5
4.0
2.5
4.5
th Hold TIme, HIGH or LOW Dn to LE
1.5
1.5
1.5
1.5
tw LE Pulse Width, HIGH
3.3 4.5 3.3 4.5
Unit
ns
ns
ns
LCX DATA
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