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PDF MC74LVQ245 Data sheet ( Hoja de datos )

Número de pieza MC74LVQ245
Descripción LOW-VOLTAGE CMOS OCTAL TRANSCEIVER
Fabricantes Motorola Semiconductors 
Logotipo Motorola Semiconductors Logotipo



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No Preview Available ! MC74LVQ245 Hoja de datos, Descripción, Manual

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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Low-Voltage Quiet CMOS
Octal Transceiver
(3-State, Non-Inverting)
The MC74LVQ245 is a high performance, non–inverting octal
transceiver operating from a 2.7 to 3.6V supply. The MC74LVQ245 is
suitable for memory address driving and all TTL level bus oriented
transceiver applications.
Current drive capability is 12mA at both A and B ports. The
Transmit/Receive (T/R) input determines the direction of data flow
through the bi–directional transceiver. Transmit (active–HIGH) enables
data from A ports to B ports; Receive (active–LOW) enables data from B
to A ports. The Output Enable input, when HIGH, disables both A and B
ports by placing them in a HIGH Z condition.
Designed for 2.7 to 3.6V VCC Operation – Ideal for Low Power/Low
Noise Applications
Guaranteed Simultaneous Switching Noise Level and Dynamic
Threshold Performance
Guaranteed Skew Specifications
Guaranteed Incident Wave Switching into 75
Low Static Supply Current (10µA) Substantially Reduces System Power
Requirements
Latchup Performance Exceeds 500mA
ESD Performance: Human Body Model >2000V
MC74LVQ245
LVQ
LOW–VOLTAGE CMOS
OCTAL TRANSCEIVER
20
1
20
1
20
1
DW SUFFIX
PLASTIC SOIC
CASE 751D–04
M SUFFIX
PLASTIC SOIC EIAJ
CASE 967–01
SD SUFFIX
PLASTIC SSOP
CASE 940C–03
Pinout: 20–Lead (Top View)
VCC OE B0 B1 B2 B3 B4 B5 B6 B7
20 19 18 17 16 15 14 13 12 11
1 2 3 4 5 6 7 8 9 10
T/R A0 A1 A2 A3 A4 A5 A6 A7 GND
20
1
DT SUFFIX
PLASTIC TSSOP
CASE 948E–02
PIN NAMES
Pins
Function
OE
T/R
A0–A7
B0–B7
Output Enable Input
Transmit/Receive Input
Side A 3–State Inputs or 3–State
Outputs
Side B 3–State Inputs or 3–State
Outputs
12/95
© Motorola, Inc. 1995
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MC74LVQ245 pdf
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MC74LVQ245
An, Bn 50% VCC
tPLH
Bn, An
50% VCC
50% VCC
tPHL
50% VCC
WAVEFORM 1 – PROPAGATION DELAYS
tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns
VCC
0V
VOH
VOL
OE, T/R
An, Bn
An, Bn
PULSE
GENERATOR
50% VCC
tPZH tPHZ
50% VCC
50% VCC
VCC
0V
VCC
VOH – 0.3V
tPZL tPLZ
50% VCC
VOL + 0.3V
GND
WAVEFORM 2 – OUTPUT ENABLE AND DISABLE TIMES
tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns
Figure 1. AC Waveforms
VCC
DUT
RT
R1
CL RL
2 VCC
OPEN
TEST
SWITCH
tPLH, tPHL
Open
tPZL, tPLZ
2 VCC
Open Collector/Drain tPLH and tPHL
2 VCC
tPZH, tPHZ
Open
CL = 50pF or equivalent (Includes jig and probe capacitance)
RL = R1 = 500or equivalent
RT = ZOUT of pulse generator (typically 50)
Figure 2. Test Circuit
ECLinPS and ECLinPS Lite
DataSheetD4LU14.0comRev 3
5
MOTOROLA

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