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PDF MT28F160C3 Data sheet ( Hoja de datos )

Número de pieza MT28F160C3
Descripción FLASH MEMORY
Fabricantes Micron Technology 
Logotipo Micron Technology Logotipo



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No Preview Available ! MT28F160C3 Hoja de datos, Descripción, Manual

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ADVANCE
1 MEG x 16
3V ENHANCED+ BOOT BLOCK FLASH MEMORY
FLASH MEMORY
MT28F160C3
Low Voltage, Extended Temperature
FEATURES
• Thirty-nine erase blocks:
Eight 4K-word parameter blocks
Thirty-one 32K-word main memory blocks
BALL ASSIGNMENT (Top View)
46-Ball FBGA
• VCC, VCCQ and VPP voltages:
2.7V–3.3V VCC
2.7V–3.3V VCCQ*
1.65V–3.3V and 12V VPP
• Address access times:
90ns, 110ns at 2.7V–3.3V
12345678
A
A13 A11
A8
VPP WP# A19
A7
A4
B
A14 A10 WE# RP# A18 A17
A5
A2
• Low power consumption:
C A15 A12 A9
A6 A3 A1
Standby and deep power-down mode < 1µA
(typical ICC)
Automatic power saving feature (APS mode)
• Enhanced WRITE/ERASE SUSPEND (1µs typical)
D A16 DQ14 DQ5 DQ11 DQ2 DQ8 CE# A0
E
VCCQ DQ15 DQ6 DQ12 DQ3 DQ9 DQ0
VSS
• 128-bit OTP area for security purposes
• Industry-standard command set compatibility
F VSS DQ7 DQ13 DQ4 VCC DQ10 DQ1 OE#
• Software/hardware block protection
OPTIONS
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NUMBER
(Ball Down)
• Timing
90ns access
NOTE: See page 3 for Ball Description Table.
-9 See last page for mechanical drawing.
110ns access
-11
DataShee
• Boot Block Starting Address
Top (FFFFFH)
Bottom (00000H)
• Package
46-ball FBGA (6 x 8 ball grid)
• Temperature Range
Commercial (0°C to +70°C)
Extended (-40°C to +85°C)
*Lower VCCQ ranges are available upon request.
Part Number Example:
MT28F160C3FD-11 TET
T
B
FD
None
ET
GENERAL DESCRIPTION
The MT28F160C3 is a nonvolatile, electrically block-
erasable (flash), programmable, read-only memory con-
taining 16,777,216 bits organized as 1,048,576 words (16
bits).
The MT28F160C3 is manufactured on 0.22µm pro-
cess technology in a 48-ball FBGA package. The device
has an I/O supply of 2.7V (MIN). Programming in pro-
duction is accomplished by using high voltage which can
be supplied on a separate line.
The embedded WORD WRITE and BLOCK ERASE
functions are fully automated by an on-chip write state
machine (WSM), which simplifies these operations and
relieves the system processor of secondary tasks. The
WSM status can be monitored by an on-chip status reg-
ister to determine the progress of program/erase tasks.
The device is equipped with 128 bits of one time
programmable (OTP) area. The soft protection feature
for blocks will mark them as read-only by configuring soft
protection registers with command sequences.
Please refer to Micron’s Web site (www.micron.com/
flash) for the latest data sheet.
DEVICE MARKING
Due to the size of the package, Micron’s standard part
number is not printed on the top of each device. Instead,
an abbreviated device mark comprised of a five-digit
alphanumeric code is used. The abbreviated device marks
are cross referenced to Micron part numbers in Table 1.
DataSheet4U.com1 Meg x 16 3V Enhanced+ Boot Block Flash Memory
MT28F160C3_3.p65 – Rev. 3, Pub. 8/01
1
©2001, Micron Technology, Inc.
PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE FOR EVALUATION AND REFERENCE PURPOSES ONLY AND
ARE SUBJECT TO CHANGE BY MICRON WITHOUT NOTICE. PRODUCTS ARE ONLY WARRANTED BY MICRON TO MEET
MICRON’S PRODUCTION DATA SHEET SPECIFICATIONS.
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1 page




MT28F160C3 pdf
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ADVANCE
1 MEG x 16
3V ENHANCED+ BOOT BLOCK FLASH MEMORY
Figure 1
Top Boot Block Memory Address Map
et4U.com
DataSheet4U.com
ADDRESS RANGE
FFFFFh
F8000h
F7FFFh
F0000h
EFFFFh
E8000h
E7FFFh
E0000h
DFFFFh
D8000h
D7FFFh
D0000h
CFFFFh
C8000h
C7FFFh
C0000h
BFFFFh
B8000h
B7FFFh
B0000h
AFFFFh
A8000h
A7FFFh
A0000h
9FFFFh
98000h
97FFFh
90000h
8FFFFh
88000h
87FFFh
80000h
7FFFFh
78000h
77FFFh
70000h
6FFFFh
68000h
67FFFh
60000h
5FFFFh
58000h
57FFFh
50000h
4FFFFh
48000h
47FFFh
40000h
3FFFFh
38000h
37FFFh
30000h
2FFFFh
28000h
27FFFh
20000h
1FFFFh
18000h
17FFFh
10000h
0FFFFh
08000h
07FFFh
00000h
8 x 4K-Word Blocks
32K-Word Block
32K-Word Block
0
1
2
Parameter
Blocks
32K-Word Block 3
32K-Word Block 4
32K-Word Block 5
32K-Word Block 6
32K-Word Block 7
32K-Word Block 8
32K-Word Block 9
32K-Word Block 10
32K-Word Block 11
32K-Word Block 12
32K-Word BlocDkataS13heet4U.com
32K-Word Block 14
32K-Word Block 15
32K-Word Block 16
32K-Word Block 17
32K-Word Block 18
32K-Word Block 19
32K-Word Block 20
32K-Word Block 21
32K-Word Block 22
32K-Word Block 23
32K-Word Block 24
32K-Word Block 25
32K-Word Block 26
32K-Word Block 27
32K-Word Block 28
32K-Word Block 29
32K-Word Block 30
32K-Word Block 31
4K-Word Block
4K-Word Block
4K-Word Block
4K-Word Block
4K-Word Block
4K-Word Block
4K-Word Block
4K-Word Block
FFFFFh
FF000h
FEFFFh
FE000h
FDFFFh
FD000h
FCFFFh
FC000h
FBFFFh
FB000h
FAFFFh
FA000h
F9FFFh
F9000h
F8FFFh
F8000h
DataShee
1 Meg x 16 3V Enhanced+ Boot Block Flash Memory
MT28F160C3_3.p65 – Rev. 3, Pub. 8/01
5 Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2001, Micron Technology, Inc.
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5 Page





MT28F160C3 arduino
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ADVANCE
1 MEG x 16
3V ENHANCED+ BOOT BLOCK FLASH MEMORY
PROGRAMMING OPERATIONS
ERASE OPERATIONS
There are two CSM commands for programming: pro-
An ERASE operation must be used to initialize all bits
gram setup and alternate program setup (see Table 2).
in an array block to “1s.” After BLOCK ERASE CONFIRM
After the desired command code is entered, the WSM
is issued, the CSM responds only to an ERASE SUSPEND
takes over and correctly sequences the device to com-
command until the WSM completes its task.
plete the program operation. Monitoring of the WRITE
Block erasure inside the memory array sets all bits
operation is possible through the status register (see the
within the addressed block to logic 1s. Erase is accom-
Status Register section). During this time, the CSM re-
plished only by blocks; data at single address locations
sponds only to a PROGRAM SUSPEND command until
within the array cannot be erased individually. The block
the PROGRAM operation has been completed, after which
to be erased is selected by using any valid address within
all commands to the CSM become valid again. (See Fig-
that block. Note that different combinations of RP#, WP#
ure 4 for programming operation.)
and VPP voltage levels ensure that data in certain blocks
During programming, VPP must remain in the
are secure and therefore cannot be erased (see Table 5 for
appropriate VPP voltage range as shown in the recom-
a list of combinations). Block erasure is initiated by a
mended operating conditions table. Different combina-
command sequence to the CSM: block erase setup (20h)
tions of RP#, WP#, and VPP voltage levels ensure that data
followed by block erase confirm (D0h) (see Figure 5). A
in certain blocks are secure and therefore cannot be
two-command erase sequence protects against acciden-
programmed (see Table 5 for a list of combinations).
tal erasure of memory contents.
Only “0s” are written and compared during a PROGRAM
When the BLOCK ERASE CONFIRM command is com-
operation. If “1s” are programmed, the memory cell con-
plete, the WSM automatically executes a sequence of
tents do not change and no error occurs.
events to complete the block erasure. During this se-
quence, the block is programmed with logic 0s, data is
PROGRAM SUSPENSION
et4U.com The PROGRAM operation can be suspended by
issuing a PROGRAM SUSPEND command (B0h). The
verified, all bits in the block are erased, and finally verifi-
cation is performed to ensure that all bits are correctly DataShee
erased. Monitoring of the ERASE operation is possible
PROGRAM SUSPEND command typically takes 1DµastatoSheet4Uth.cromugh the status register (see the Status Register sec-
execute, and the device is then in program suspend mode.
tion).
Once the WSM has reached the suspend state, it allows
the CSM to respond only to READ ARRAY, READ STATUS
ERASE SUSPENSION
REGISTER, and PROGRAM RESUME commands. During
During the execution of an ERASE operation, the
the PROGRAM SUSPEND operation, array data should
ERASE SUSPEND command (B0h) can be entered to di-
be read from an address other than the one being pro-
rect the WSM to suspend the ERASE operation. The ERASE
grammed. To resume the PROGRAM operation, a PRO-
SUSPEND command typically takes 1µs to execute, and
GRAM RESUME command (D0h) must be issued to cause
the device is then in erase suspend mode. Once the WSM
the CSM to clear the suspend state previously set. (See
has reached the suspend state, it allows the CSM to
Figure 7 for PROGRAM SUSPEND and PROGRAM
respond only to the READ ARRAY, READ STATUS REGIS-
RESUME.)
TER, ERASE RESUME and PROGRAM commands. Dur-
Table 5
Data Protection Combinations
DATA PROTECTION PROVIDED
All blocks locked
All blocks locked
All blocks unlocked
Soft-protected blocks locked
VPP
VPPLK
X
VPPLK
VPPLK
RP#
X
VIL
VIH
VIH
WP#
X
X
VIH
VIL
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1 Meg x 16 3V Enhanced+ Boot Block Flash Memory
MT28F160C3_3.p65 – Rev. 3, Pub. 8/01
DataSheet4 U .com
11
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2001, Micron Technology, Inc.

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