|
|
PDF SH67K91 Data sheet ( Hoja de datos )
| Número de pieza | SH67K91 | |
| Descripción | 20K 4-Bit Micro Controller | |
| Fabricantes | Sino Wealth Microelectronic | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de SH67K91 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
www.DataSheet4U.com
SH67K91
20K 4-bit Micro-controller with LCD Driver, 4/8 channels Chord
Feature
SH6610C-Based Single-Chip 4-bit Micro-controller
- 32 Seg X 6 Com (1/6 duty, 1/3 or 1/4 Bias)
ROM: 20K X 16 bits
- 32 Seg X 8 Com (1/8 duty, 1/3 or 1/4 Bias)
RAM: 1437 X 4 bits
12 Segments Used as Scan Output
- 48 bytes System Control Register
4/8 Channels Chords
- 1325 bytes Data Memory
9 bits DAC
- 64 bytes LCD RAM
Oscillator (Code Option)
Operation Voltage: 2.4V - 5.5V
OSC
16 CMOS Bi-directional I/O pads (8 shared with
- Crystal Oscillator 32.768kHz
Segment)
- RC Oscillator: 262kHz
4-Level Stacks (include interrupts)
OSCX
One 8-bit Auto Re-load Timer/Counter
8-bit Base Timer
Powerful Interrupt Sources
- Ceramic Resonator 455kHz - 4MHz
- RC Oscillator 4MHz
Instruction Cycle Time
- External Interrupt (falling edge)
- 122.07µs for 32.768 kHz Crystal
- Timer0 Interrupt
- 15.27µs for 262 kHz RC
- Base Timer Interrupt
- External Interrupts: PORTB and PORTC
DataSheet4U.c- o1µms for 4 MHz RC
Two Low Power Operation Mode: HALT and STOP
LCD Driver
Warm-up Timer for Power-On Reset (POR)
- 32 Seg X 4 Com (1/4 duty, 1/3 or 1/4 Bias)
- 32 Seg X 5 Com (1/5 duty, 1/3 or 1/4 Bias)
Available In CHIP FORM
DataShee
General Description
SH67K91 is a single-chip 4-bit micro-controller. This device integrates a SH6610C CPU core, RAM, ROM, Timer, LCD driver,
I/O port, 4/8 channels chord and DAC. This chip contains a built-in dual-oscillator to enhance the total chip performance. This
device is suitable for simple CID cord phone.
DataSheet4U.com
DataSheet4 U .com
1
V1.0
1 page  
www.DataSheet4U.com
et4U.com
SH67K91
Functional Description
1. CPU
The CPU contains the following functional blocks: 1.4. Table Branch Register (TBR)
Program Counter (PC), Arithmetic Logic Unit (ALU), Carry
Flag (CY), Accumulator, Table Branch Register, Data
Pointer (INX, DPH, DPM, and DPL) and Stacks.
Table Data can be stored in program memory and can be
referenced by using Table Branch (TJMP) and Return
Constant (RTNW) instructions. The TBR and AC are
1.1. PC
placed by an offset address in program ROM. TJMP
The PC is used for ROM addressing consisting of 12-bit:
Page Register (PC11), and Ripple Carry Counter (PC10,
PC9, PC8, PC7, PC6, PC5, PC4, PC3, PC2, PC1, PC0).
The program counter is loaded with data corresponding to
instruction branch into address ((PC11 - PC8) X (28) +
(TBR, AC)). The address is determined by RTNW to return
look-up value into (TBR, AC). ROM code bit7-bit4 is
placed into TBR and bit3-bit0 into AC.
each instruction. The unconditional jump instruction (JMP) 1.5. Data Pointer
can be set at 1-bit page register for higher than 2K.
The Data Pointer can indirectly address data memory.
The program counter can only include 4K program ROM Pointer address is located in register DPH (3-bit), DPM
address. (Refer to the ROM description).
(3-bit) and DPL (4-bit). The addressing range can have
1.2. ALU and CY
The ALU performs arithmetic and logic operations. The
ALU provides the following functions:
Binary addition/subtraction (ADC, SBC, ADD, SUB, ADI, SBI)
3FFH locations. Pseudo index address (INX) is used to
read or write Data memory, then RAM address bit9 - bit0
which comes from DPH, DPM and DPL.
1.6. Stack
Decimal adjustments for addition/subtraction (DAA, DAS)
The stack is a group of registers used to save the contents
Logic operations (AND, EOR, OR, ANDIM, EORIM, ORIM)
Decisions (BA0, BA1, BA2, BA3, BAZ, BNZ, BC, BNC)
Logic Shift (SHR)
of CY & PC (11-0) sequentially with each subroutine call or
interrupt. The MSB is saved for CY and it is organized into
13 bits X 4 levels. The stack is operated on a first-in,
last-out basis and returned sequentially to the PC with the
The Carry Flag (CY) holds the ALU overflow that the
return instructions (RTNI/RTNW).
arithmetic operation generates. During an interrupt service
or a CALL instruction, the carry flag is pushed into the
Note:
stack and recovered from the stack by the RTNI
The stack nesting includes both subroutine calls and
instruction. It is unaffected
1.3. Accumulator (AC)
by
the
RTNW
instructionD.ataSheet4isUnut.ebcrrorumuptitnse
requests.
calls and
of calls and interrupt
The maximum levels allowed for
interrupts are 4 levels. If the number
requests exceeds 4, then the bottom
The accumulator is a 4-bit register holding the results of
of the stack will be shifted out, that program execution may
the arithmetic logic unit. In conjunction with the ALU, data
enter an abnormal state.
is transferred between the accumulator and system
register, or data memory can be executed.
DataShee
DataSheet4U.com
DataSheet4 U .com
5
5 Page 
www.DataSheet4U.com
et4U.com
4. Initial State
4.1. System Register State
Address
Bit3
Bit2
$00 IEX
IET0
$01 IRQX IRQT0
$02 TM0.3 TM0.2
$03 BTM.3 BTM.2
T0L.3
T0L.2
$04
TC0L.3
TC0L.2
TL0H.3
TL0H.2
$05
TC0H.3
TC0H.2
$06 BTC.7 BTC.6
$07 BTC.3 BTC.2
$08 PA.3
PA.2
$09 PB.3
PB.2
$0A PC.3
PC.2
$0B PD.3
PD.2
$0C PPULL
HLM
$0D RAMBNK
LCM2
$0E TBR.3 TBR.2
$0F INX.3
INX.2
$10 DPL3
DPL2
$11 - DPM.2
$12 - DPH.2
$13 LCDON
O/S2
$14 COM_MD1 COM_MD0
$15
PACR.3
PACR.2
$16
PBCR.3
PBCR.2
$17
PCCR.3
PCCR.2
$18 IRQ_PA0 IRQ_FSKIN
$19 TM0.4 PDCR
$1A
DAC_S3
DAC_S2
$1B CH_M CH_S2
TONE10
$1C -
DG10
-
TONE7
TONE6
$1D DG7
DG6
DA7 DA6
Bit1 Bit0
IEBT
IEP
IRQBT
IRQP
TM0.1
TM0.0
BTM.1
BTM.0
T0L.1
T0L.0
TC0L.1
TC0L.0
TL0H.1
TL0H.0
TC0H.1
TC0H.0
BTC.5
BTC.4
BTC.1
BTC.0
PA.1
PA.0
PB.1
PB.0
PC.1
PC.0
PD.1
PD.0
OXM
OXON
LCMD1ataSheet4LCUM.c0om
TBR.1
TBR.0
INX1
INX.0
DPL1
DPL0
DPM.1
DPM.0
DPH.1
DPH.0
O/S1
O/S0
BIAS
LCD_FREQ
PACR.1
PACR.0
PBCR.1
PBCR.0
PCCR.1
PCCR.0
B1 B0
--
DAC_S1
DAC_S0
CH_S1
CH_S0
TONE 9
DG9
-
TONE5
DG5
DA5
TONE 8
DG8
DA8
TONE4
DG4
DA4
DataSheet4U.com
DataSheet4 U .com
11
SH67K91
Power-on Reset/Pin Reset
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
xxxx
xxxx
xxxx
xxxx
0000
0000
xxxx
xxxx
xxxx
xxxx
xxxx
0011
0000
0000
0000
0000
0001
0000
0000
0000
0000
0000
DataShee
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet SH67K91.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| SH67K91 | 20K 4-Bit Micro Controller | Sino Wealth Microelectronic |
| SH67K93 | 24K 4-Bit Micro Controller | Sino Wealth Microelectronic |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |