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PDF AM41DL6408G Data sheet ( Hoja de datos )
| Número de pieza | AM41DL6408G | |
| Descripción | Stacked Multi-Chip Package (MCP) Flash Memory and SRAM | |
| Fabricantes | SPANSION | |
| Logotipo |  |
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Am41DL6408G
Data Sheet
July 2003
The following document specifies Spansion memory products that are now offered by both Advanced
Micro Devices and Fujitsu. Although the document is marked with the name of the company that orig-
inally developed the specification, these products will be offered to customers of both AMD and
Fujitsu.
Continuity of Specifications
There is no change to this datasheet as a result of offering the device as a Spansion product. Any
changes that have been made are the result of normal datasheet improvement and are noted in the
document revision summary, where supported. Future routine revisions will occur when appropriate,
and changes will be noted in a revision summary.
Continuity of Ordering Part Numbers
AMD and Fujitsu continue to support existing part numbers beginning with “Am” and “MBM”. To order
these products, please use only the Ordering Part Numbers listed in this document.
For More Information
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Please contact your local AMD or Fujitsu sales office for additional information about Spansion
memory solutions.
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Publication Number 25560 Revision B Amendment 0 Issue Date August 19, 2002
1 page  
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PRELIMINARY
SRAM Write Cycle .................................................................. 56
Figure 30. SRAM Write Cycle—WE# Control ................................. 56
Figure 31. SRAM Write Cycle—CE1#s Control .............................. 57
Figure 32. SRAM Write Cycle—UB#s and LB#s Control................ 58
Flash Erase And Programming Performance . . . 59
Latchup Characteristics . . . . . . . . . . . . . . . . . . . 59
Package Pin Capacitance . . . . . . . . . . . . . . . . . . 59
Data Retention . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
SRAM Data Retention . . . . . . . . . . . . . . . . . . . . . 60
Figure 33. CE1#s Controlled Data Retention Mode....................... 60
Figure 34. CE2s Controlled Data Retention Mode......................... 60
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 61
FLB073—73-Ball Fine-Pitch Grid Array 8 x 11.6 mm ............. 61
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 62
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Am41DL6408G
August 19, 2002
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PRELIMINARY
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Table 1.
Operation
(Notes 1, 2)
Device Bus Operations—Flash Word Mode, CIOf = VIH; SRAM Word Mode, CIOs = VCC
CE#f CE1#s CE2s OE# WE# SA
Addr.
LB#s
UB#s
RESET#
WP#/ACC
(Note 4)
DQ7–
DQ0
DQ15–
DQ8
Read from Flash
HX
L
X
LH X
L
AIN
X
X
H
L/H
DOUT
DOUT
Write to Flash
HX
L
X
HL X
L
AIN
X
X
H (Note 4) DIN DIN
Standby
VCC ±
0.3 V
H
X
X
XX X
L
X
X
X
VCC ±
0.3 V
H High-Z High-Z
Output Disable
HH X X L X
L LH
H
HH X X X L
L/H High-Z High-Z
Flash Hardware
Reset
HX
X XX X
XL
X XX
L
L/H High-Z High-Z
Sector Protect
(Note 5)
HX
SADD,
L
X
L
HL
X
A6 = L,
A1 = H,
X
X
VID
A0 = L
L/H DIN X
Sector Unprotect
(Note 5)
HX
SADD,
L
X
L
HL
X
A6 = H,
A1 = H,
X
X
VID (Note 6) DIN
A0 = L
X
Temporary Sector
Unprotect
X
H
X
X
XX X
L
X
XX
VID (Note 6) DIN High-Z
LL
Read from SRAM H L H L HDataSXheet4UA.INcom H L
H
LH
LL
Write to SRAM
H L H X L X AIN H L
H
LH
DOUT
DOUT
X High-Z DOUT
DOUT High-Z
DIN DIN
X High-Z DIN
DIN High-Z
Legend: L = Logic Low = VIL, H = Logic High = VIH, VID = 11.5–12.5 V, VHH = 9.0 ± 0.5 V, X = Don’t Care, SA = SRAM Address
Input, Byte Mode, SADD = Flash Sector Address, AIN = Address In, DIN = Data In, DOUT = Data Out
Notes:
1. Other operations except for those indicated in this column are inhibited.
2. Do not apply CE#f = VIL, CE1#s = VIL and CE2s = VIH at the same time.
3. Don’t care or open LB#s or UB#s.
4. If WP#/ACC = VIL , the boot sectors will be protected. If WP#/ACC = VIH the boot sectors protection will be removed.
If WP#/ACC = VACC (9V), the program time will be reduced by 40%.
5. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the “Sector/Sector
Block Protection and Unprotection” section.
6. If WP#/ACC = VIL, the two outermost boot sectors remain protected. If WP#/ACC = VIH, the two outermost boot sector protection
depends on whether they were last protected or unprotected using the method described in “Sector/Sector Block Protection and
Unprotection”. If WP#/ACC = VHH, all sectors will be unprotected.
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Am41DL6408G
August 19, 2002
11 Page | ||
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