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Número de pieza | CT212 | |
Descripción | DVB Decoder Chip | |
Fabricantes | CHEERTEK | |
Logotipo | ||
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PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE
CT212
CTK CONFIDENTIAL, NO DISCLOSURE
CT212
DVB Decoder Chip
wwwS.DpaetacSifhiceaett4ioUn.com
Rev. 0.9
Page 1
The above information is the exclusive intellectual property of Cheertek Inc. and shall not be disclosed, distributed or reproduced without permission from Cheertek Inc.
Copyright (C) 2003 Cheertek Inc. All Rights Reserved.
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PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE
CT212
CTK CONFIDENTIAL, NO DISCLOSURE
Support frame rate conversion for different video formats
Support flexible horizontal and vertical scaling of x 16 ~ x 1/16
BrightView to brighten the details of dark area in a picture: Normal/Bright/Soft
Fade in/out control
Support background picture
Support 16 color 32x32 cursor
Four rectangle strip planes.
OSD (On Screen Display)
2 bits, 4 bits and 8 bits per pixel, up to 256 color palettes
♦ One line to full screen OSD
♦ Region-based alpha-blending
♦ Scroll display capability
Highlight processing
www.DataSheet4U.comSeamlessly link adjacent OSD regions
64 mix-weighting level for blending OSD and video
Bitmap OSD
♦ Support horizontal pixel duplication to enlarge bitmap automatically.
♦ Support sub-region redraw to facilitate bitmap display.
Font OSD:
♦ Support 2 bits/pixel encoding font OSD.
♦ Support eight kinds of font size for each region
♦ Maximum 256 characters in one font table
♦ Eight choices of font size to build font table: 4 pixels to 32 pixels in 4 pixels step
♦ Support horizontal pixel duplication to enlarge character automatically.
♦ Maximum 44 characters display and maximum 8 different font colors for each region
♦ Support color-change option to enrich font color.
TV encoder
NTSC-M, PAL-B, D, G, H, I, NC, M encoding
Support interlace and progressive scan
Page 5
The above information is the exclusive intellectual property of Cheertek Inc. and shall not be disclosed, distributed or reproduced without permission from Cheertek Inc.
Copyright (C) 2003 Cheertek Inc. All Rights Reserved.
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PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE
CT212
CTK CONFIDENTIAL, NO DISCLOSURE
SA[7:0]/GPA[15: I/O When LATS=1, SA[7:0] input is specified, representing the low byte
8] address bus, input.
When LATS=0, two options: one is SA[7:0] output of the low byte
address latched from SAD[7:0] input by ALE; the other is GPA[15:8],
general purpose IO bus A bits[15:8], bi-directional; SA[7:0] output is
default.
SA[15:8]
I The high byte of the address bus.
CS# I Chip select input, active low
INTTS#
O Interrupt request of on-chip transport de-multiplex processor, active low.
INTM#
O Interrupt request of on-chip AV decoder, active low.
WR#
I Write enable, active low.
RD# I Read enable, active low.
4.3 SDRAM Intewrfawce Swign.aDls ataSheet4U.com
Pin name
MA[11:0]
BS[1:0]
MD[15:0]
SDCLK
SDCLKI
SCS#
RAS#
Type
O
O
I/O
O
I
O
O
Description (64M type)
Alternative (2x16M type)
SDRAM Address bus output
MA[11]: no use
MA[10:0]: Address bus output
SDRAM Bank Select output
BS[0]: BA, Bank address output
BS[1]: SCS1#, Chip select output of 2nd
SDRAM, active low
SDRAM Data bus keeps as input state MD[15:0]
except for WRITE operation
SDRAM Clock Output
SDCLK
SDRAM Clock Input
SDCLKI
SDRAM Chip Select output, active
Low
SCS0#, Chip select output of 1st SDRAM,
active low
Row Address Strobe output, active
Low
RAS#
Page 11
The above information is the exclusive intellectual property of Cheertek Inc. and shall not be disclosed, distributed or reproduced without permission from Cheertek Inc.
Copyright (C) 2003 Cheertek Inc. All Rights Reserved.
DataSheet4 U .com
www.DataSheet4U.com
11 Page |
Páginas | Total 21 Páginas | |
PDF Descargar | [ Datasheet CT212.PDF ] |
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