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PDF MB510 Data sheet ( Hoja de datos )
| Número de pieza | MB510 | |
| Descripción | 2.7GHz TWO MODULUS PRESCALER | |
| Fabricantes | Fujitsu Media Devices | |
| Logotipo |  |
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www.DataSheet4U.com
Sept. 1995
Edition 3.0b
DATA SHEET
MB510
2.7GHz TWO MODULUS PRESCALER
2.7GHz TWO MODULUS PRESCALER
The Fujitsu MB510 is an ultra high speed, two modulus prescaler that forms a
Phase Locked Loop (PLL) when combined with a frequency synthesizer such as
the Fujitsu MB87001A. It divides the input frequency by the modulus of 128/144
or 256/272, and operates at a low power supply current of 10mA at 5.0V.
Through the use of Fujitsu’s Advanced Process Technology, the MB510 achieves
extremely small stray capacitance from its internal elements.
FEATURES
S High Frequency Operation:
2.7GHz max.
S Power Dissipation:
50mW typ.
S Pulse Swallow Function:
128/144, 256/272
S Wide Operation Temperature: -40°C to +85°C
S Stable Output Amplitude:
S Built–in Termination Resistor
VOUT = 1.6Vp–p typ.
S Complete PLL synthesizer circuit with the Fujitsu MB87001A PLL
synthesizer IC
S Package
Standard 8-pin Flat Package
(Suffix: –PF)
PLASTIC PACKAGE
FPT-08P-M01
PIN ASSIGNMENT
ABSOLUTE MAXIMUM RATINGS (See Note)
Rating
Symbol
Value
Unit
Supply Voltage
VCC –0.5 to +7.0
V
Input Voltage
VIN –0.5 to VCC
V
Output Current
IO 10 mA
Storage Temperature
TSTG
–55 to +125
°C
Note:
Permanentdevice damage may occur if the aboveAbsolute Maximum Ratings are
exceeded. Functional operation should be restricted to the conditions as detailed in
the operational sections of this data sheet. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
Copyright E 1995 by FUJITSU LIMITED and FUJITSU MICROELECTRONICS, INC.
IN
VCC
SW
OUT
18
27
TOP VIEW
36
45
IN
NC
MC
GND
This device contains circuitry to protect the inputs against
damage due to high static voltages or electric fields. However,
it is advised that normal precautions be taken to avoid
application of any voltage higher than maximum rated voltages
to this high impedance circuit.
1 page  
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TIMING CHART (2 MODULUS)
Example: Divide ratio = 128/144
128
IN
MB510
144
64
OUT
64 64 64 64
64
64 80
64 64 80 64 80 64 80
MC
tSET
tSET
Note: When divide of 144 is selected, positive pulse is applied by 16 to 80.
The typical set up time is 16 ns from the MC signal input to the timing of change of prescaler divide ratio.
Clock
Data
LE
Lock
Det.
VCC
C1
VCC
C2 X1
VCC
0.047µF
16 15 14 13 12 11 10 9
MB 87001A
1 2 34 56 7 8
10KΩ
VSX (Max. 8V)
12KΩ
100KΩ
33KΩ
VCC
12KΩ
10KΩ
VCO
1000pF
VCC
876 5
MB 510
1 234
1000pF
1000pF
1000pF
2.2KΩ
X1 : 12.8MHz X’tal
VCC : 5V + 10%
VSX : 8V max.
C1, C2 : depends on crystal oscillator
10KΩ
OUTPUT
Figure 4. Typical Application Example
5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet MB510.PDF ] | |
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