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PDF CY2CC1910 Data sheet ( Hoja de datos )
| Número de pieza | CY2CC1910 | |
| Descripción | 1:10 Clock Fanout Buffer with Output Enable | |
| Fabricantes | Cypress Semiconductor | |
| Logotipo |  |
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( DataSheet : www.DataSheet4U.com )
COMLINK™ SERIES
CY2CC1910
1:10 Clock Fanout Buffer with Output Enable
Features
• Low-voltage operation
• Full-range support:
— 3.3V
— 2.5V
— 1.8V
• 1:10 fanout
• Drives either a 50-Ohm or 75-Ohm load
• Over voltage tolerant input hot swappable
• Low-input capacitance
• Low-output skew
• Low-propagation delay
• Typical (tpd < 4 ns)
• High-speed operation:
— 100 [email protected]
— 200 [email protected]/3.3V
• Industrial versions available
• Available packages include: SOIC, SSOP
Block Diagram
5
OE#
AVCMOS
VDD
6
IN
AVCMOS
3,10
15,22
1,12,13
17,24
Description
The Cypress series of network circuits are produced using
advanced 0.35-micron CMOS technology, achieving the
industries fastest logic and buffers.
The Cypress CY2CC1910 fanout buffer features one input and
ten outputs. Ideal for conversion from/to 3.3V/2.5V/1.8V.
Designed for data communications clock management appli-
cations, the large fanout from a single input reduces loading
on the input clock.
Cypress employs unique AVCMOS-type outputs VOI™
(Variable Output Impedance) that dynamically adjust for
variable impedance matching and eliminate the need for
series damping resistors; they also reduce noise overall.
23
Q1
21
Q2
19
Q3
18
Q4
16
Q5
14
Q6
11
Q7
Pin Configuration
GND
Q10
VDD
Q9
OE#
IN
GND
GND
Q8
VDD
Q7
GND
1
2
3
4
5
6
7
8
9
10
11
12
24 GND
23 Q1
22 VDD
21 Q2
20 GND
19 Q3
18 Q4
17 GND
16 Q5
15 VDD
14 Q6
13 GND
24 pin SOIC/SSOP
GND
9
Q8
4
Q9
2
Q10
OUTPUT (AVCMOS)
Pin Description
Pin Number
1, 7, 8, 12, 13, 17, 20, 24
3,10,15,22
5
GND
VDD
OE#
Pin Name
Pin Description
Ground
Power
Power Supply
Power
Output Enable
LVTTL/LVCMOS
6 IN
Input
LVTTL/LVCMOS
2, 4, 9, 11, 14, 16, 18, 19, 21, 23 Q10, Q9, Q8, Q7, Q6, Q5, Q4, Q3, Q2, Q1 Output
AVCMOS
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Document #: 38-07347 Rev. **
Revised April 24, 2002
www.DataSheet4U.com
www.DataSheet4U.com
1 page  
COMLINK™ SERIES
CY2CC1910
From Output
Under Test
CL = 3 pF
500 ohm
Figure 4. Point to Point Load Circuit[3,4,5]
tw(50-50)
0.8VDD
Input
VDD/2
VDD/2
0V
Input
tw(20-80)
VDD/2
0.8VDD
0V
Figure 5. Voltage Waveforms–Pulse Duration[4]
Parameter Measurement Information: VDD @
1.8V
From Output
Under Test
CL = 6 pF
500 ohm
Input
Figure 6. Load Circuit [3,4,5]
0.9V 0.9V
1.8V
0V
tPLH tPHL
0.9V 0.9V VOH
Output
VOL
Figure 7. Voltage Waveforms Propagation Delay Times[6]
tw(50-50)
1.8V
Input 0.9V 0.9V
0V
Input
tw(20-80)
0.9V
1.8V
0V
Figure 8. Voltage Waveforms–Pulse Duration[4]
INPUT
OUTPUT
tPLH
3V
1.5V
0V
tPHL
VOH
1.5V
VOL
l ltsk(P) = tPHL - tPLH
Figure 9. Pulse Skew - tsk(p)
Document #: 38-07347 Rev. **
Page 5 of 8
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet CY2CC1910.PDF ] | |
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