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PDF MC33883 Data sheet ( Hoja de datos )
| Número de pieza | MC33883 | |
| Descripción | H-Bridge Gate Driver IC | |
| Fabricantes | Motorola Semiconductors | |
| Logotipo |  |
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Freescale Semiconductor
Technical Data
H-Bridge Gate Driver IC
The 33883 is an H-bridge gate driver (also known as a full-bridge
pre-driver) IC with integrated charge pump and independent high-
and low-side gate driver channels. The gate driver channels are
independently controlled by four separate input terminals, thus
allowing the device to be optionally configured as two independent
high-side gate drivers and two independent low-side gate drivers.
The low-side channels are referenced to ground. The high-side
channels are floating.
The gate driver outputs can source and sink up to 1.0 A peak
current pulses, permitting large gate-charge MOSFETs to be driven
and/or high Pulse Width Modulation (PWM) frequencies to be utilized.
A linear regulator is incorporated, providing a 15 V typical gate supply
to the low-side gate drivers.
Features
• VCC Operating Voltage Range from 5.5 V up to 55 V
• VCC2 Operating Voltage Range from 5.5 V up to 28 V
• CMOS/LSTTL Compatible I/O
• 1.0 A Peak Gate Driver Current
• Built-In High-Side Charge Pump
• Undervoltage Lockout (UVLO)
• Overvoltage Lockout (OVLO)
• Global Enable with <10 µA Sleep Mode
• Supports PWM up to 100 kHz
MC33883
Rev 8.0, 06/2005
33883
H-BRIDGE GATE DRIVER IC
DW SUFFIX
98ASB42343B
20-TERMINAL SOICW
ORDERING INFORMATION
Device
Temperature
Range (TA)
Package
MC33883D/R2 -40°C to 125°C
20 SOICW
VBAT VBOOST
33883
VCC CP_OUT
VCC2
G_EN
LR_OUT
C1 GATE_HS1
C2 SRC_HS1
MCU GATE_LS1
GATE_HS2
IN_HS1 SRC_HS2
IN_LS1 GATE_LS2
IN_HS2
IN_LS2 GND_A GND /2
DC
Motor
Figure 1. 33883 Simplified Application Diagram
* This document contains certain information on a new product.
Specifications and information herein are subject to change without notice.
© Freescale Semiconductor, Inc., 2005. All rights reserved.
www.DataSheet4U.com
www.DataSheet4U.com
www.DataSheet4U.com
1 page  
STATIC ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 3. Static Electrical Characteristics
Characteristics noted under conditions VCC = 12 V, VCC2 = 12 V, CCP = 33 nF, G_EN = 4.5 V unless otherwise noted. Typical
values noted reflect the approximate parameter means at TA = 25°C under nominal conditions unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max Unit
OPERATING CONDITIONS
Supply Voltage 1 for Output High-Side Driver and Charge Pump
Supply Voltage 2 for Linear Regulation
High-Side Floating Supply Absolute Voltage
VCC
VCC2
VCP_OUT
5.5
5.5
VCC+4
– 55 V
– 28 V
–
VCC + 11
V
but < 65
LOGIC
Logic 1 Input Voltage (IN_LS and IN_HS)
Logic 0 Input Voltage (IN_LS and IN_HS)
Logic 1 Input Current
VIN = 5.0 V
Wake-Up Input Voltage (G_EN)
Wake-Up Input Current (G_EN)
VG_EN = 14 V
Wake-Up Input Current (G_EN)
VG_EN = 28 V
VIH 2.0 – 10 V
VIL – – 0.8 V
IIN+ µA
200 – 1000
VG_EN
4.5
5.0
VCC2
V
IG_EN
µA
– 200 500
IG_EN2
–
mA
– 1.5
LINEAR REGULATOR
Linear Regulator
VLR_OUT @ VCC2 from 15 V to 28 V, ILOAD from 0 mA to 20 mA
VLR_OUT @ ILOAD = 20 mA
VLR_OUT @ ILOAD = 20 mA, VCC2 = 5.5 V, VCC = 5.5 V
VLR_OUT
12.5
VCC2 - 1.5
4.0
–
–
–
V
16.5
–
–
CHARGE PUMP
Charge Pump Output Voltage, Reference to VCC
VCC = 12 V, ILOAD = 0 mA, CCP_OUT = 1.0 µF
VCC = 12 V, ILOAD = 7.0 mA, CCP_OUT = 1.0 µF
VCC2 = VCC = 5.5 V, ILOAD = 0 mA, CCP_OUT = 1.0 µF
VCC2 = VCC = 5.5 V, ILOAD = 7.0 mA, CCP_OUT = 1.0 µF
VCC = 55 V, ILOAD = 0 mA, CCP_OUT = 1.0 µF
VCC = 55 V, ILOAD = 7.0 mA, CCP_OUT = 1.0 µF
VCP_OUT
7.5
7.0
2.3
1.8
7.5
7.0
–
–
–
–
–
–
V
–
–
–
–
–
–
Peak Current Through Pin C1 Under Rapidly Changing VCC Voltages (see
Figure 13, page 15)
IC1
-2.0 –
A
2.0
Minimum Peak Voltage at Pin C1 Under Rapidly Changing VCC Voltages
(see Figure 13, page 15)
VC1min
-1.5
–
V
–
Analog Integrated Circuit Device Data
Freescale Semiconductor
33883
5
5 Page 
TYPICAL APPLICATIONS
TYPICAL APPLICATIONS
TURN-ON
For turn-on, the current required to charge the gate source
capacitor Ciss in the specified time can be calculated as
follows:
IP = Qg/tr = 80 nC/80 ns ≈ 1.0 A
Where Qg is power MOSFET gate charge and tr is peak
current for rise time.
TURN-OFF
The peak current for turn-off can be obtained in the same
way as for turn-on, with the exception that peak current for fall
time, tf, is substituted for tr:
IP = Qg/tf = 80 nC/80 ns ≈ 1.0 A
In addition to the dynamic current required to turn off or on
the MOSFET, various application-related switching scenarios
must be considered. These scenarios are presented in
Figure 7. In order to withstand high dV/dt spikes, a low
resistive path between gate and source is implemented
during the OFF-state.
Flyback spike charges low-
side gate via Crss charge
current Irss up to 2.0 A.
Causes increased uncon-
trolled turn-on of low-side
MOSFET.
Flyback spike pulls down
high-side source VGS.
Delays turn-off of high-
side MOSFET.
Flyback spike charges low-
side gate via Crss charge
current Irss up to 2.0 A.
Delays turn-off of low-side
MOSFET.
Flyback spike pulls down
high-side source VGS.
Causes increased uncon-
trolled turn-on of high-side
Crss
GATE_HS
VGATE
Ciss
Irss Crss
GATE_LS
OFF
Ciss
VBAT
Crss
GATE_HS
L1 ILOAD Ciss
Crss
GATE_LS
OFF
Ciss
VBAT
Crss
OFF
GATE_HS
L1 ILOAD
Ciss
Crss
GATE_LS
Ciss
VBAT
Crss
OFF
VGATE
-VDRN GATE_HS
L1 ILOAD
Ciss
Crss
VBAT
L1 ILOAD
GATE_LS
Ciss
Driver Requirement:
Low Resistive Gate-
Source Path During
OFF-State
Driver Requirement:
Low Resistive Gate-
Source Path During
OFF-State. High Peak
Sink Current Capability
Driver Requirement:
High Peak Sink Current
Capability
Figure 7. OFF-State Driver Requirement
Driver Requirement:
Low Resistive Gate-
Source Path During
OFF-State
Analog Integrated Circuit Device Data
Freescale Semiconductor
33883
11
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet MC33883.PDF ] | |
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