|
|
PDF IS62WV5128CLL Data sheet ( Hoja de datos )
| Número de pieza | IS62WV5128CLL | |
| Descripción | 512K x 16 Low Voltage / Ultra Low Power CMOS SRAM | |
| Fabricantes | Integrated Silicon Solution | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de IS62WV5128CLL (archivo pdf) en la parte inferior de esta página. Total 11 Páginas | ||
|
No Preview Available !
IS62WV5128CLL
ISSI®
512K x 8 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM
MARCH 2003
FEATURES
• High-speed access time: 55ns, 70ns
• CMOS low power operation
– 1.5 µW (typical) CMOS standby
• TTL compatible interface levels
• Single power supply
– 2.5V--3.6V VDD (62WV5128CLL)
• Fully static operation: no clock or refresh
required
• Three state outputs
• Industrial temperature available
• 2 CS Options Available
FUNCTIONAL BLOCK DIAGRAM
DESCRIPTION
The ISSI IS62WV5128CLL are high-speed, 4M bit static
RAMs organized as 512K words by 8 bits. It is fabricated
using ISSI's high-performance CMOS technology. This
highly reliable process coupled with innovative circuit
design techniques, yields high-performance and low power
consumption devices.
When CS1 is HIGH (deselected) or when CS2 is LOW
(deselected) the device assumes a standby mode at
which the power dissipation can be reduced down with
CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs. The active LOW Write Enable
(WE) controls both writing and reading of the memory.
The IS62WV5128CLL is packaged in the JEDEC standard
36-pin mini BGA (6mm x 8mm). 36-pin mini BGA is
available in both 1CS and 2CS options.
A0-A18
VDD
GND
I/O0-I/O7
DECODER
I/O
DATA
CIRCUIT
CS2
CS1
OE
WE
CONTROL
CIRCUIT
512K x 8
MEMORY ARRAY
COLUMN I/O
www.DataSheet4U.com
Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability
arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any
published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. 00B
www0.3D/13/03ataSheet4U.com
1
1 page  
IS62WV5128CLL
ISSI ®
POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
62WV5128CLL (2.5V - 3.6V)
Symbol Parameter
ICC VDDDynamicOperating
SupplyCurrent
ICC1 OperatingSupply
Current
ISB1 TTLStandbyCurrent
(TTL Inputs)
Test Conditions
VDD = Max.,
IOUT = 0 mA, f = fMAX
VDD = Max.,
IOUT = 0 mA, f = 0
VDD = Max.,
VIN = VIH or VIL
CS1 = VIH , CS2 = VIL,
f = 1 MHZ
Com.
Ind.
Com.
Ind.
Com.
Ind.
Max.
55 ns
50
55
2
3
0.6
0.8
Max.
70 ns
45
50
2
3
0.6
0.8
Unit
mA
mA
mA
ISB2 CMOSStandby
VDD = Max.,
Com.
Current(CMOSInputs) CS1≥VDD–0.2V,
Ind.
CS2 ≤ 0.2V,
typ(2)
VIN ≥ VDD – 0.2V,or
Vin ≤ 0.2V, f = 0
10 10
10 10
0.5 0.5
µA
Note:
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
2. Typical values are measured at VDD = 3.0V, TA = 25oC. Not 100% tested.
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
Symbol
Parameter
55 ns
Min. Max.
70 ns
Min. Max.
Unit
tRC Read Cycle Time
55 —
70 —
ns
tAA
Address Access Time
— 55
— 70
ns
tOHA Output Hold Time
10 —
10 —
ns
tACS1/tACS2
CS1/CS2 Access Time
— 55
— 70
ns
tDOE OE Access Time
— 35
— 40
ns
tHZOE(2)
OE to High-Z Output
— 20
— 25
ns
tLZOE(2)
OE to Low-Z Output
5—
5—
ns
t tHZCS1/ HZCS2(2) CS1/CS2 to High-Z Output 0 20
0 25
ns
t tLZCS1/ LZCS2(2) CS1/CS2 to Low-Z Output
10 —
10 —
ns
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0.4 to VDD-
0.3V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. 00B
03/13/03
5
5 Page 
PACKAGING INFORMATION
Mini Ball Grid Array
Package Code: B (36-pin)
ISSI®
Top View
1 2 3 4 56
Bottom View
φ b (36x)
654321
A
B
C
DD
E
F
G
H
E
A2
SEATING PLANE
e
D1
A
B
C
D
E
F
G
H
A
A1
e
E1
Notes:
1. Controlling dimensions are in millimeters.
mBGA - 6mm x 8mm
MILLIMETERS
INCHES
mBGA - 8mm x 10mm
MILLIMETER
INCHES
Sym. Min. Typ. Max.
N0.
Leads
36
A — — 1.20
A1 0.24 — 0.30
A2 0.60 — —
D 7.90 8.00 8.10
D1 5.25BSC
E 5.90 6.00 6.10
E1 3.75BSC
e 0.75BSC
b 0.30 0.35 0.40
Min. Typ. Max.
36
— — 0.047
0.009 — 0.012
0.024 — —
0.311 0.315 0.319
0.207BSC
0.232 0.236 0.240
0.148BSC
0.030BSC
0.012 0.014 0.016
Sym. Min. Typ. Max.
N0.
Leads
36
A — — 1.20
A1 0.24 — 0.30
A2 0.60 — —
D 9.90 10.00 10.10
D1 5.25BSC
E 7.90 8.00 8.10
E1 3.75BSC
e 0.75BSC
b 0.30 0.35 0.40
Min. Typ. Max.
36
— — 0.047
0.009 — 0.012
0.024 — —
0.390 0.394 0.398
.207BSC
0.311 0.315 0.319
0.148BSC
0.030BSC
0.012 0.014 0.016
Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. E
01/15/03
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet IS62WV5128CLL.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| IS62WV5128CLL | 512K x 16 Low Voltage / Ultra Low Power CMOS SRAM | Integrated Silicon Solution |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |