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PDF MSM85C154HVS Data sheet ( Hoja de datos )
| Número de pieza | MSM85C154HVS | |
| Descripción | (MSM8xC154x) CMOS 8-bit Microcontroller | |
| Fabricantes | ETC | |
| Logotipo |  |
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1 page  
4.5.2.5.7 Caution about use of timer counters 0 and 1 .................................. 90
4.5.2.5.8 Caution about use of timer counters 0 and 1 when setting software
power down mode........................................................................... 91
4.5.3 Timer/counter 2 .........................................................................................92
4.5.3.1 Outline ...................................................................................................92
4.5.3.2 Timer 2 control register (T2CON) ..........................................................92
4.5.3.3 Timer/counter 2 operation modes ..........................................................93
4.5.3.3.1 16-bit auto reload mode .................................................................. 93
4.5.3.3.2 16-bit capture mode ........................................................................94
4.5.3.3.3 16-bit baud rate generator mode .................................................... 95
4.5.3.4 Timer/counter 2 detector circuit ............................................................. 97
4.5.3.4.1 T2(timer/counter 2 external clock detector) .................................... 97
4.5.3.4.2 T2EX(timer/counter 2 external flag input detector) ......................... 97
4.5.3.5 Timer/counter carry signal detector circuit ............................................. 98
4.6 Serial Port .........................................................................................................99
4.6.1 Outline .......................................................................................................99
4.6.2 Special function registers for serial port .................................................. 101
4.6.2.1 SCON ..................................................................................................101
4.6.2.2 SBUF ...................................................................................................103
4.6.2.3 TCLK ...................................................................................................103
4.6.2.4 RCLK ...................................................................................................103
4.6.2.5 SMOD ..................................................................................................104
4.6.2.6 SERR ..................................................................................................105
4.6.3 Operating modes .....................................................................................106
4.6.3.1 Mode 0 .................................................................................................106
4.6.3.1.1 Outline........................................................................................... 106
4.6.3.1.2 Mode 0 baud rate ..........................................................................106
4.6.3.1.3 Mode 0 transmit operation ............................................................106
4.6.3.1.4 Mode 0 receive operation ............................................................. 106
4.6.3.2 Mode 1 ..................................................................................................110
4.6.3.2.1 Outline........................................................................................... 110
4.6.3.2.2 Mode 1 baud rate ..........................................................................110
4.6.3.2.3 Mode 1 transmit operation ............................................................111
4.6.3.2.4 Mode 1 receive operation ............................................................. 111
4.6.3.2.5 Mode 1 UART error detection ....................................................... 112
4.6.3.3 Mode 2 .................................................................................................115
4.6.3.3.1 Outline........................................................................................... 115
4.6.3.3.2 Mode 2 baud rate ..........................................................................115
4.6.3.3.3 Mode 2 transmit operation ............................................................115
4.6.3.3.4 Mode 2 receive operation ............................................................. 115
4.6.3.3.5 Mode 2 UART error detection ....................................................... 116
4.6.3.4 Mode 3 .................................................................................................119
4.6.3.4.1 Outline........................................................................................... 119
4.6.3.4.2 Mode 3 baud rate ..........................................................................119
4.6.3.4.3 Mode 3 transmit operation ............................................................120
4.6.3.4.4 Mode 3 receive operation. ............................................................120
4.6.3.4.5 Mode 3 UART error detection ....................................................... 121
4.6.4 Serial port application examples ..............................................................124
4.6.4.1 I/O extension .......................................................................................124
5 Page 
MSM80C154S/83C154S/85C154HVS
execution from the next address after the stop address where CPU power down mode was
activated.
Each of the quasi-bidirectional ports 1, 2, and 3 can be set independently as high impedance
input ports. And the 10 kW pull-up resistance for these input ports can be isolated from the
power supply (VCC), leaving only the 100 kW pull-up resistance and thereby enabling the
quasi-bidirectional ports to be driven by devices with low drive capacity. Furthermore, the
outputs of ports, 0, 1, 2, and 3 can be switched to floating status during CPU power down
modes (PD, HPD).
Three built-in 16-bit timer/counters capable of operating in a wide range of modes enable the
CPUs to be used in many different ways. And since timer/counters 0 and 1 can be operated
by external clock during CPU power down modes (PD, HPD) where the oscillator is stopped,
these two counters can also be used in cancelling CPU power down modes.
UART based serial communication can be executed at any baud rate by carry signal from
timer/counter 1 or timer/counter 2.
If an overrun or framing error is generated during data reception, the SERR bit in the I/O
control register is set. And by testing this SERR bit, the accuracy of the data can be checked
quite easily to ensure correct serial communication.
As can be seen, these CPUs are equipped with a very comprehensive range of functions. Also
note that EASE80C51mkII is available for use as the program development support system
for these CPUs.
Equipped with the MSM85C154E dedicated evachip, EASE80C51mkII is capable of pro-
gram area mapping, realtime tracing, generating breaks according to accumulator contents,
and various other functions designed for accurate and efficient support of program develop-
ment of these CPUs.
With this great line-up of functions and with EASE80C51mkII capable of developing
programs in a very short time, MSM80C154S/MSM83C154S/MSM85C154HVS give a highly
integrated high performance solution.
4
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| PDF Descargar | [ Datasheet MSM85C154HVS.PDF ] | |
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