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PDF STK6011 Data sheet ( Hoja de datos )
| Número de pieza | STK6011 | |
| Descripción | 8051 Embedded Microcontroller | |
| Fabricantes | Syntek Semiconductor | |
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STK6011
DATA SHEET
by
.comSYNTEK®
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w6F, YU FENG BLDG. 317 SUNG-CHANG RD., TAIPEI, TAIWAN, R.O.C.
TEL: 886-2-25056383
omFAX: 886-2-25064323
t4U.cHEADQUARTER
ee3F, NO.24-2, INDUSTRY E.RD., IV, SCIENCE-BASED INDUSTRIAL PARK, HSINCHU, TAIWAN, R.O.C.
hTEL: 886-3-5773181
taSFAX: 886-3-5778010
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1 page  
STK6011
1. GENERAL DESCRIPTION
The STK6011 is an 8-bit micro-controller, which is compatible with the industry standard 8051 CPU. It
consists of an 8051 CPU core, a 64k-byte internal program Flash ROM support to ISP function, a 1024-byte
SRAM, four 8-bit I/O ports, an extra 4-bit I/O port, two 16-bit timer/counter, an UART serial port, five interrupt
source, a watchdog timer, 5 built PWM DACs, and a 4-channel A/D converter.
2. FEATURES
• Industry 8051 core
• 36 bi-directional I/O pins (max.)
• 5 channels of PWM DAC (max.)
• 4 channels of 6-bit ADC (max.)
• 64K bytes of program Flash ROM support to In-System Programming (ISP)
• 1024 bytes of SRAM
• Watchdog timer featuring programmable interval
• Built-in lower power reset circuit
• Power-down wakeup by interrupt (INT0# or INT1#)
• Flash ROM program code protection
• 5V/3.3V power supply with bonding option
• Package designed with 40-pin DIP, 42-pin SDIP, 44-pin PLCC, 44-pin QFP, or 48-pin LQFP
3. BLOCK DIAGRAM
AUXRAM
AD0~3
ADC
DA0~4
PWM DAC
XADR
XRD
XWR
P0.0~7
P2.0~7
RD
WR
ALE
XFR
CONTROL
WATCHDOG
TIMER
P0.0~7
P2.0~7
RD
WR
ALE
P0.0~P0.7
P1.0~P1.7
P2.0~P2.7
P3.0~P3.7
P4.0~P4.7
EA#
PSEN#
ALE
8051 CORE
RST
X1
X2
5
5 Page 
STK6011
Reset.
CHIPCON (w): Chip Configuration Register, all standing for “0” in Chip Reset
XRAMen = 1 → To enable the on-chip AUXRAM
= 0 → To disable the on-chip AUXRAM
ALEdis = 1 → To disable pin ALE output for low EMI
= 0 → To enable pin ALE output
CPUclk = 1 → CPU working at a double rate
= 0 → CPU working at a normal rate
8.2.2 Internal RAM (256 Bytes)
256 bytes of the internal RAM kept in STK6011 are the same as that of 8052 standard.
8.2.3 Auxiliary RAM (AUXRAM, 768 Bytes)
Total 768 bytes of the auxiliary RAM is configured in the 8051 external data memory area 0000h – 02FFh.
Programs can use the “MOVX @Ri” instruction to access the AUXRAM memory area 0000h – 00FFh, or
“MOVX @DPTR” instruction to access the AUXRAM full memory area 0000h – 02FFh. The AUXRAM is
disabled after a reset. Setting the ”XRAMen” bit in CHIPCON register will enable the access to AUXRAM.
When AUXRAM is enabled, the “MOVX” instruction will always access to on-chip AUXRAM. At the time of
execution from internal program memory, an access to AUXRAM will not affect the Port0, Port2, WR# and
RD#.
8.2.4 External Special Function Registers (XFR)
The XFR is a group of registers configured in the 8051 external RAM area 0F00h – 0FFFh for the special
functions. Programs can use the “MOVX “ instruction to access these registers.
FFh
Internal RAM
SFR
Accessible by
indirect
addressing only
(Using
MOV A,@Ri
instruction)
80h
7Fh Internal RAM
Accessible by
direct addressing
XFR
0FFF
h
Accessible by
indirect external
RAM addressing
(Using
MOVX
instruction)
AUXRAM
0F00h
02FFh
Accessible by
direct and indirect
addressing
00h
Accessible by
indirect external
RAM addressing
(Using
MOVX
instruction
0000h
11
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet STK6011.PDF ] | |
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