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PDF LM4960SQ Data sheet ( Hoja de datos )
| Número de pieza | LM4960SQ | |
| Descripción | Piezoelectric Speaker Driver | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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October 2004
LM4960
Piezoelectric Speaker Driver
General Description
The LM4960 utilizes a switching regulator to drive a dual
audio power amplifier. It delivers 24VP-P mono-BTL to a
ceramic speaker with less than 1.0% THD+N while operating
on a 3.0V power supply.
The LM4960’s switching regulator is a current-mode boost
converter operating at a fixed frequency of 1.6MHz.
Boomer audio power amplifiers were designed specifically to
provide high quality output power with a minimal amount of
external components. The LM4960 does not require output
coupling capacitors or bootstrap capacitors, and therefore is
ideally suited for mobile phone and other low voltage appli-
cations where minimal power consumption is a primary re-
quirement.
The LM4960 features a low-power consumption externally
controlled micropower shutdown mode. Additionally, the
LM4960 features and internal thermal shutdown protection
mechanism along with a short circuit protection.
The LM4960 is unity-gain stable and can be configured by
external gain-setting resistors.
Key Specifications
n VOUT @ VDD = 3.0 THD+N ≤ 1%
n Power supply range
n Switching Frequency
Features
n Stereo BTL amplifier
n Low current shutdown mode
n "Click and pop" suppression circuitry
n Low Quiescent current
n Unity-gain stable audio amplifiers
n External gain configuration capability
n Thermal shutdown protection circuitry
n Wide input voltage range (3.0V - 7V)
n 1.6MHz switching frequency
Applications
n Mobile phone
n PDA’s
Connection Diagram
LM4960SQ
24VP-P (typ)
3.0 to 7V
1.6MHz (typ)
Top View
Order Number LM4960SQ
See NS Package Number
20076582
Boomer® is a registered trademark of National Semiconductor Corporation.
© 2004 National Semiconductor Corporation DS200765
www.national.com
1 page  
Typical Performance Characteristics
THD+N vs Frequency
VDD = 3V, V1 = 9.6V, V0 = 3Vrms
THD+N vs Frequency
VDD = 3V, V1 = 12V, V0 = 3Vrms
20076514
THD+N vs Frequency
VDD = 3V, V1 = 15V, V0 = 3Vrms
20076515
THD+N vs Frequency
VDD = 5V, V1 = 9.6V, V0 = 3Vrms
20076516
THD+N vs Frequency
VDD = 5V, V1 =12V, V0 = 3Vrms
20076517
THD+N vs Frequency
VDD = 5V, V1 =15V, V0 = 3Vrms
20076518
5
20076519
www.national.com
5 Page 
Application Information (Continued)
CALCULATING OUTPUT CURRENT OF BOOST
CONVERTER (IAMP)
As shown in Figure 2 which depicts inductor current, the load
current is related to the average inductor current by the
relation:
ILOAD = IIND(AVG) x (1 - DC)
(7)
Where "DC" is the duty cycle of the application. The switch
current can be found by:
ISW = IIND(AVG) + 1/2 (IRIPPLE)
(8)
Inductor ripple current is dependent on inductance, duty
cycle, input voltage and frequency:
IRIPPLE = DC x (VIN-VSW) / (f x L)
(9)
combining all terms, we can develop an expression which
allows the maximum available load current to be calculated:
ILOAD(max) = (1–DC)x(ISW(max)–DC(VIN-VSW))/fL (10)
The equation shown to calculate maximum load current
takes into account the losses in the inductor or turn-OFF
switching losses of the FET and diode.
DESIGN PARAMETERS VSW AND ISW
The value of the FET "ON" voltage (referred to as VSW in
equations 7 thru 10) is dependent on load current. A good
approximation can be obtained by multiplying the "ON Re-
sistance" of the FET times the average inductor current.
FET on resistance increases at VIN values below 5V, since
the internal N-FET has less gate voltage in this input voltage
range (see Typical Performance Characteristics curves).
Above VIN = 5V, the FET gate voltage is internally clamped
to 5V.
The maximum peak switch current the device can deliver is
dependent on duty cycle. For higher duty cycles, see Typical
Performance Characteristics curves.
INDUCTOR SUPPLIERS
Recommended suppliers of inductors for the LM4960 in-
clude, but are not limited to Taiyo-Yuden, Sumida, Coilcraft,
Panasonic, TDK and Murata. When selecting an inductor,
make certain that the continuous current rating is high
enough to avoid saturation at peak currents. A suitable core
type must be used to minimize core (switching) losses, and
wire power losses must be considered when selecting the
current rating.
PCB LAYOUT GUIDELINES
High frequency boost converters require very careful layout
of components in order to get stable operation and low
noise. All components must be as close as possible to the
LM4802 device. It is recommended that a 4-layer PCB be
used so that internal ground planes are available.
Some additional guidelines to be observed:
1. Keep the path between L1, D1, and Co extremely short.
Parasitic trace inductance in series with D1 and Co will
increase noise and ringing.
2. The feedback components R1, R2 and Cf 1 must be kept
close to the FB pin of U1 to prevent noise injection on the FB
pin trace.
3. If internal ground planes are available (recommended)
use vias to connect directly to ground at pin 2 of U1, as well
as the negative sides of capacitors Cs1 and Co.
GENERAL MIXED-SIGNAL LAYOUT
RECOMMENDATION
This section provides practical guidelines for mixed signal
PCB layout that involves various digital/analog power and
ground traces. Designers should note that these are only
"rule-of-thumb" recommendations and the actual results will
depend heavily on the final layout.
Power and Ground Circuits
For 2 layer mixed signal design, it is important to isolate the
digital power and ground trace paths from the analog power
and ground trace paths. Star trace routing techniques (bring-
ing individual traces back to a central point rather than daisy
chaining traces together in a serial manner) can have a
major impact on low level signal performance. Star trace
routing refers to using individual traces to feed power and
ground to each circuit or even device. This technique will
take require a greater amount of design time but will not
increase the final price of the board. The only extra parts
required may be some jumpers.
Single-Point Power / Ground Connection
The analog power traces should be connected to the digital
traces through a single point (link). A "Pi-filter" can be helpful
in minimizing high frequency noise coupling between the
analog and digital sections. It is further recommended to
place digital and analog power traces over the correspond-
ing digital and analog ground traces to minimize noise cou-
pling.
Placement of Digital and Analog Components
All digital components and high-speed digital signals traces
should be located as far away as possible from analog
components and circuit traces.
Avoiding Typical Design / Layout Problems
Avoid ground loops or running digital and analog traces
parallel to each other (side-by-side) on the same PCB layer.
When traces must cross over each other do it at 90 degrees.
Running digital and analog traces at 90 degrees to each
other from the top to the bottom side as much as possible will
minimize capacitive noise coupling and crosstalk.
11 www.national.com
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| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet LM4960SQ.PDF ] | |
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