|
|
PDF PLL600-27 Data sheet ( Hoja de datos )
| Número de pieza | PLL600-27 | |
| Descripción | (PLL600-17/27/37) Ultra Low Current XO | |
| Fabricantes | PhaseLink | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de PLL600-27 (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
|
No Preview Available !
om PLL600-17/-27/-37Preliminary
.cUltra Low Current XO (Crystals from 10 MHz to 52 MHz)
et4UFEATURES
he• Low phase noise (-130 dBc @ 10kHz offset).
taS• CMOS output with OE tri-state control.
a• Selectable oscillator “on” or “off” feature in
.Doutput disable mode
• Ultra Low current consumption (<2.5mA, <2mA,
w<1.3mA at 27MHz respectively for PLL600-17,
wPLL600-27, and PLL600-37)
w• Ultra Low disable mode current (<2uA when
mdisabled with osc. off)
o• 10 to 52MHz fundamental crystal input.
• Selectable divider by 2 (PLL600-17 only).
.c• 12mA drive capability at TTL output.
• Low jitter (RMS): 2.5ps period jitter.
U• 2.25V to 3.63V DC operation.
• Available in 8 pin SOIC, 6 pin SOT or DIE.
t4DESCRIPTION
eeThe PLL600-17/-27/-37 form a low cost family of XO
IC’s, designed to consume the lowest current on the
hmarket for the 5MHz to 52MHz range. It accepts
input crystal from 10 to 52MHz (fundamental
Sresonant mode) and offers a selectable divider by 2
ta(PLL600-17 only) or no division. Providing less than
-130dBc at 10kHz offset at 30MHz, and with a very
low jitter (2.5 ps RMS period jitter) makes this chip
aideal for applications requiring low current frequency
sources, such as handheld devices.
.DBLOCK DIAGRAM
wwSEL
Reference
Divider
w .comXIN
ataSheet4UXOUT
XTAL
OSC
CLK
OE
OSCSEL
PIN ASSIGNMENT (PACKAGE)
8 pin SOIC
XIN
SEL*^
GND
OSCSEL^
1
2
3
4
8 XOUT
7 OE^
6 VDD
5 CLK
* Note:
^:
pin2 is SEL for PLL600-17
pin2 is N/C for PLL600-27/-37
denotes internal pull-up
6 pin SOT
CLK
GND
XIN
1
2
3
6 VDD
5 OE^
4 XOUT
^: denotes internal Pull-up
PAD ASSIGNMENT (DIE)
8
1
27
6
3
5
4
SELECTION TABLE
SEL (PLL600-17 only)
DIVIDER
0 /2
1 No division
Internal Pull-up, default value is ‘1’ when not connected.
Selectable divider only available on P600-17.
OE OSCSEL
OUTPUT
0 0 Disabled - osc. off
0 1 Disabled - osc. on
1 0 Enabled
1 1 Enabled
Internal Pull-up, default value is ‘1’ when not connected.
Not available in 6 pin SOT package.
www.D47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 9/23/03 Page 1
1 page  
Preliminary PLL600-17/-27/-37
Ultra Low Current XO (Crystals from 10 MHz to 52 MHz)
PACKAGE INFORMATION
Symbol
A
A1
B
C
D
E
H
L
e
8 PIN ( dimensions in mm )
Narrow SOIC
Min. Max.
1.47 1.73
0.10 0.25
0.33 0.51
0.19 0.25
4.80 4.95
3.80 4.00
5.80 6.20
0.38 1.27
1.27 BSC
TSSOP
Min. Max.
- 1.20
0.05 0.15
0.19 0.30
0.09 0.20
2.90 3.10
4.30 4.50
6.20 6.60
0.45 0.75
0.65 BSC
EH
D
A1
B
e
C
L
A
6 PIN SOT (dimensions in mm)
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 9/23/03 Page 5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet PLL600-27.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| PLL600-20 | (PLL600-10/20/30) Ultra Low Current XO | PhaseLink |
| PLL600-27 | (PLL600-17/27/37) Ultra Low Current XO | PhaseLink |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |