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PDF MAX3205E Data sheet ( Hoja de datos )
| Número de pieza | MAX3205E | |
| Descripción | (MAX3205E - MAX3208E) Dual / Quad and Hex High-Speed Differential ESD-Protection ICs | |
| Fabricantes | Maxim Integrated Products | |
| Logotipo |  |
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19-3361; Rev 2; 3/05
heet4U.comDuDaiflf,eQreunatdi,aal nEdSDH-ePxroHteigchti-oSnpeICedsGeneral Description
taSThe MAX3205E/MAX3207E/MAX3208E low-capaci-
tance, ±15kV ESD-protection diode arrays with an inte-
agrated transient voltage suppressor (TVS) clamp are
.Dsuitable for high-speed and general-signal ESD protec-
tion. Low input capacitance makes these devices ideal
wfor ESD protection of signals in HDTV, PC monitors
w(DVI™, HDMI™), PC peripherals (FireWire®, USB 2.0),
w server interconnect (PCI Express™, Infiniband®),
datacom, and interchassis interconnect. Each channel
mconsists of a pair of diodes that steer ESD current puls-
oes to VCC or GND.
The MAX3205E/MAX3207E/MAX3208E protect against
.cESD pulses up to ±15kV Human Body Model, ±8kV
Contact Discharge, and ±15kV Air-Gap Discharge, as
specified in IEC 61000-4-2. An integrated TVS ensures
Uthat the voltage rise seen on VCC during an ESD event
is clamped to a known voltage. These devices have a
t42pF input capacitance per channel, and a channel-to-
channel capacitance variation of only 0.05pF, making
them ideal for use on high-speed, single-ended, or dif-
eferential signals.
eThe MAX3207E is a two-channel device suitable for
USB 1.1, USB 2.0 (480Mbps), and USB OTG applica-
htions. The MAX3208E is a four-channel device for
Ethernet and FireWire applications. The MAX3205E is a
Ssix-channel device for cell phone connectors and
SVGA video connections.
taThe MAX3205E is available in 9-bump, tiny chip-scale
(UCSP™), and 16-pin, 3mm x 3mm, thin QFN pack-
aages. The MAX3207E is available in a small 6-pin
SOT23 package. The MAX3208E is available in 10-pin
µMAX® and 16-pin, 3mm x 3mm TQFN packages. All
.Ddevices are specified for the -40°C to +125°C automo-
tive operating temperature range.
Applications
wDVI Input/Output Protection
wSet-Top Boxes
PDAs/Cell Phones
w omGraphics Controller Cards
.cDisplays/Projectors
UHigh-Speed, Full-Speed and Low-Speed USB
t4Port Protection
eFireWire IEEE 1394 Ports
heConsumer Equipment
SHigh-Speed Differential Signal Protection
taTypical Operating Circuit and Pin Configurations appear at
aend of data sheet.
Features
♦ Low Input Capacitance of 2pF Typical
♦ Low Channel-to-Channel Variation of 0.05pF
from I/O to I/O
♦ High-Speed Differential or Single-Ended ESD
Protection
±15kV–Human Body Model
±8kV–IEC 61000-4-2, Contact Discharge
±15kV–IEC 61000-4-2, Air-Gap Discharge
♦ Integrated Transient Voltage Suppressor (TVS)
♦ Optimized Pinout for Minimized Stub Instances on
Controlled-Impedance Differential-Transmission
Line Routing
♦ -40°C to +125°C Automotive Operating
Temperature Range
♦ UCSP Packaging Available
Ordering Information
PART
TEMP
RANGE
PIN-
PACKAGE
PKG
CODE
MAX3205EABL-T -40°C to +125°C 9 UCSP-9
B9-2
MAX3205EATE
-40°C to +125°C
16 TQFN-EP*
(3mm x 3mm)
T1633-4
MAX3207EAUT-T -40°C to +125°C 6 SOT23-6
U6-1
MAX3208EAUB -40°C to +125°C 10 µMAX
U10-2
MAX3208EATE
-40°C to +125°C 16 TQFN-EP* T1633-4
(3mm x 3mm)
*EP = Exposed pad.
FireWire is a registered trademark of Apple Computer, Inc.
PCI Express is a trademark of PCI-SIG Corporation.
DVI is a trademark of Digital Display Working Group.
HDMI is a trademark of HDMI Licensing, LCC.
InfiniBand is a registered trademark of InfiniBand Trade
Association.
UCSP is a trademark and µMAX is a registered trademark of
Maxim Integrated Products, Inc.
Selector Guide
PART
MAX3205EABL-T
MAX3205EATE
MAX3207EAUT-T
MAX3208EAUB
MAX3208EATE
ESD-PROTECTED
I/O PORTS
6
6
2
4
4
TOP MARK
AES
ACO
ABVG
—
ACN
.D________________________________________________________________ Maxim Integrated Products 1
wwFor pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
w1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1 page  
Dual, Quad, and Hex High-Speed
Differential ESD-Protection ICs
Applications Information
Design Considerations
Maximum protection against ESD damage results from
proper board layout (see the Layout Recommendations
section). A good layout reduces the parasitic series
inductance on the ground line, supply line, and protect-
ed signal lines. The MAX3205E/MAX3207E/MAX3208E
ESD diodes clamp the voltage on the protected lines
during an ESD event and shunt the current to GND or
VCC. In an ideal circuit, the clamping voltage (VC) is
defined as the forward voltage drop (VF) of the protec-
tion diode, plus any supply voltage present on the cath-
ode.
For positive ESD pulses:
VC = VCC + VF
For negative ESD pulses:
VC = -VF
The effect of the parasitic series inductance on the
lines must also be considered (Figure 1).
For positive ESD pulses:
VC
=
VCC
+
VF(D1)
+
⎛⎝⎜L1 x
d(IESD)
dt
⎞
⎠⎟
+
⎛⎝⎜L2
x
d(IESD
dt
)
⎞
⎠⎟
For negative ESD pulses:
VC
=
⎛
− ⎝⎜ VF(D2)
+
⎛⎝⎜L1 x
d(IESD
dt
)⎞
⎠⎟
+
⎛⎝⎜L3
x
d(IEdSt D)⎞⎠⎟
⎞
⎠⎟
where, IESD is the ESD current pulse.
During an ESD event, the current pulse rises from zero
to peak value in nanoseconds (Figure 2). For example,
in a 15kV IEC-61000 Air-Gap Discharge ESD event, the
pulse current rises to approximately 45A in 1ns (di/dt =
45 x 109). An inductance of only 10nH adds an addi-
tional 450V to the clamp voltage, and represents
approximately 0.5in of board trace. Regardless of the
device’s specified diode clamp voltage, a poor layout
with parasitic inductance significantly increases the
effective clamp voltage at the protected signal line.
Minimize the effects of parasitic inductance by placing
the MAX3205E/MAX3207E/MAX3208E as close to the
connector (or ESD contact point) as possible.
A low-ESR 0.1µF capacitor is recommended between
VCC and GND in order to get the maximum ESD protec-
tion possible. This bypass capacitor absorbs the
charge transferred by a positive ESD event. Ideally, the
supply rail (VCC) would absorb the charge caused by a
positive ESD strike without changing its regulated
value. All power supplies have an effective output
impedance on their positive rails. If a power supply’s
effective output impedance is 1Ω, then by using V = I x
R, the clamping voltage of VC increases by the equa-
tion VC = IESD x ROUT. A +8kV IEC 61000-4-2 ESD
event generates a current spike of 24A. The clamping
voltage increases by VC = 24A x 1Ω, or VC = 24V.
Again, a poor layout without proper bypassing increas-
es the clamping voltage. A ceramic chip capacitor
mounted as close as possible to the MAX3205E/
MAX3207E/MAX3208E VCC pin is the best choice for
this application. A bypass capacitor should also be
placed as close to the protected device as possible.
POSITIVE SUPPLY RAIL
L1
PROTECTED
LINE
L2
D1
I/O_
D2
L3
GROUND RAIL
I
100%
90%
10%
tR = 0.7ns to 1ns
30ns
60ns
t
Figure 1. Parasitic Series Inductance
Figure 2. IEC 61000-4-2 ESD Generator Current Waveform
_______________________________________________________________________________________ 5
5 Page 
Dual, Quad, and Hex High-Speed
Differential ESD-Protection ICs
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
______________________________________________________________________________________ 11
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet MAX3205E.PDF ] | |
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