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PDF MB504LV Data sheet ( Hoja de datos )
| Número de pieza | MB504LV | |
| Descripción | (MB501LV / MB504LV) Low Voltage . Low Power 2 Modulus Prescalers | |
| Fabricantes | Fujitsu | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de MB504LV (archivo pdf) en la parte inferior de esta página. Total 9 Páginas | ||
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mSept. 1995
.coEdition 4.0a
DATA SHEET
MLOBW.D5a0VtOa1SLLThVAeeG/5tE40U/L4OLWVPOWER TWO MODULUS PRESCALERSLOW VOLTAGE/LOW POWER TWO MODULUS PRESCALERS
wThe Fujitsu MB501LV/504LV are low power and low voltage versions of
wMB501/504, two modulus prescalers used with a frequency synthesizer to make
a Phase Locked Loop (PLL). They will divide the input frequency by the modulus
wof 64/65 or 128/129 for the MB501LV, and 32/33 or 64/65 for the MB504LV. The
moutput level is 1.1V peak to peak on ECL level.
.coS Wide Low Voltage Operation 3.0V typ., +2.7 to 4.5V
S High Frequency Operation, Low Power Operation (VIN = –12dBm min.)
U1.1 GHz at 36mW typ. (MB501LV)
t4520MHz at 18mW typ. (MB504LV)
eS Pulse Swallow Function
eS Wide Operation Temperature TA = –40°C to +85°C
hS Stable Output Amplitude
VOUT = 1.1Vp-p typ.
SS Built-in a termination resistor
taStable output amplitude is obtained up to output load capacitance of 8pF.
S Complete PLL synthesizer circuit with the Fujitsu MB87001A, PLL
asynthesizer IC
.DS Plastic 8-pin Standard Dual-In-Line Package or space saving Flat Package
PLASTIC PACKAGE
DIP-08P-M01
PLASTIC PACKAGE
FPT-08P-M01
wABSOLUTE MAXIMUM RATINGS (see NOTE)
wRating
Symbol
Value
w omSupply Voltage
.cInput Voltage
t4UOutput Current
eStorage Temperature
VCC
VIN
IO
TSTG
-0.5 to +7.0
-0.5 to + VCC
10
– 55 to +125
Unit
V
V
mA
_C
.DataSheNote:
Permanentdevice damage may occur if the aboveAbsolute Maximum Ratings are
exceeded. Functional operation should be restricted to the conditions as detailed in
the operational sections of this data sheet. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
IN
VCC
SW
OUT
18
2
TOP VIEW
3
7
6
45
IN
NC
MC
GND
This device contains circuitry to protect the inputs against damage
due to high static voltages or electric fields. However, it is advised
that normal precautions be taken to avoid application of any
voltage higher than maximum rated voltages to this high
impedance circuit.
wwwCopyright E 1992 by FUJITSU LIMITED
1 page  
Example: Divide Ratio of 64/65
IN
MB501LV TIMING CHART (2 MODULUS)
64 65
MB501LV
MS504LV
32
OUT
32 32 32 32
32
32 33
32 32 33 32 33 32 32
MC
tSET
tSET
Notes:
When divide ratio of 65 is selected, positive pulse is added by one to 33.
The typical set up time is 16ns from MC signal input to the timing of change of prescaler divide ratio.
Example: Divide Ratio of 32/33
IN
MB504LV TIMING CHART (2 MODULUS)
32 33
16
OUT
16 16 16 16
16
16 17
16 16 17 16 17 16 16
MC
tSET
tSET
Notes:
When divide of 33 is selected, positive pulse is added by one to 17.
The typical set up time is 18ns from MC signal input to the timing of change of prescaler divide ratio.
5
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet MB504LV.PDF ] | |
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