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PDF PM5310 Data sheet ( Hoja de datos )

Número de pieza PM5310
Descripción TelecomBus Serializer for 2.5 Gbit/s Interconnect
Fabricantes PMC-Sierra 
Logotipo PMC-Sierra Logotipo



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PMC-Sierra,Inc.
Preliminary
TelecomBus Serializer for 2.5 Gbit/s Interconnect
PM5310
TBS
FEATURES
• Encodes data from the Incoming
parallel TelecomBus to a set of four
working, a set of four protection, and a
set of four auxiliary 777.6 Mbit/s LVDS
serial TelecomBus links with extended
8B/10B-based encoding.
• Decodes data from a set of four
working, a set of four protection, or a
set of four auxiliary 777.6 MHz LVDS
serial links with extended 8B/10B-
based encoding to the Outgoing
TelecomBus stream.
• Provides capacity to carry an STS-
12/STM-4 stream in each LVDS serial
TelecomBus link. Four links can be
aggregated to form an STS-48c/STM-
16c stream.
• Provides capacity to carry an STS-
12/STM-4 stream in each 8-bit bus of
the parallel TelecomBus stream. Four
8-bit buses can be aggregated to carry
an STS-48c/STM-16c stream.
• Provides redundant working,
protection and auxiliary transmit LVDS
serial TelecomBus streams and
redundant receive LVDS serial
TelecomBus streams for protection
switching purposes.
• Provides independent time-slot
interchange blocks on the Incoming
and Outgoing parallel TelecomBus
streams to allow arbitrary arrangement
of time-slots at STS-1 granularity.
• Supports redundant working/protection
time-space-time switch fabric.
• Supports through-traffic, drop-traffic
and protection switching in UPSR, 2-
fibre BLSR and 4-fibre BLSR
applications (when used with the
PM5372 TSE).
• Uses extended 8B/10B-based line
coding protocol on the serial links to
provide transition density guarantee
and DC balance and to offer a greater
control character vocabulary than the
standard 8B/10B protocol.
• Provides encoding of TelecomBus
control signals at the multiplex section
termination (MST) point, high-order
path termination (HPT) point and low-
order path termination (LPT) point.
• Provides optional PRBS generation for
each outgoing LVDS serial
TelecomBus data link for off-line link
verification.
• Provides PRBS detection for each 8-bit
bus on the Incoming parallel
TelecomBus stream.
• Provides PRBS detection for each
incoming LVDS serial TelecomBus
stream for off-line link verification.
• Provides optional PRBS generator for
each 8-bit bus on the outgoing parallel
TelecomBus stream.
• Provides in-service link verification by
optionally overwriting the B1 and E1
byte of each constituent STS-1/STM-0
with a unique software programmable
byte and its complement.
• Provides pins to coordinate updating of
the connection map of the time-slot
interchange blocks in the local device,
peer PM5310 TBS devices and
companion PM5372 TSE devices.
• Derives all internal timing from a single
77.76 MHz system clock.
BLOCK DIAGRAM
ID[4:1][7:0]
IDP[4:1]
IPL[4:1]
IJ0J1[4:1]
IPAIS[4:1]
ITV5[4:1]
ITPL[4:1]
ITAIS[4:1]
SYSCLK
OD[4:1][7:0]
ODP[4:1]
OPL[4:1]
OJ0J1[4:1]
OPAIS[4:1]
OTV5[4:1]
OTPL[4:1]
OTAIS[4:1]
Incoming Data
8B/10B Encoder
(ID8E #1 - #4)
Incoming
TelecomBus
PRBS
Processor
(ITPP #1 - #4)
Incoming
PRBS
8B/10B
Encoder
(IP8E #1 - #4)
Transmit Working
Time-Slot
Interchange
(TWTI)
Transmit Protect
Time-Slot
Interchange
(TPTI)
Transmit Auxiliary
Time-Slot
Interchange
(TATI)
Transmit Working
Disparity Encoder
(TWDE #1 - #4)
Transmit Protect
Disparity Encoder
(TPDE #1 - #4)
Transmit Auxiliary
Disparity Encoder
(TADE #1 - #4)
Transmit Working
Serializer
(TWPS #1 - #4)
Transmit Protect
Serializer
(TPPS #1 - #4)
Transmit Auxiliary
Serializer
(TAPS #1 - #4)
Transmit Working
LVDS Interface
(TWLV #1 - #4)
Transmit Protect
LVDS Interface
(TPLV #1 - #4)
Transmit Auxiliary
LVDS Interface
(TALV #1 - #4)
Tx Ref
Clock
Synthesis
Unit
Outgoing
TelecomBus
PRBS
Generator
(OTPG #1 - #4)
Receive
Working Time-
Slot Interchg
(RWTI)
Receive Protect
Time-Slot
Interchg
(RPTI)
Receive
Auxiliary Time-
Slot Interchg
(RATI)
Receive
Working PRBS
Monitor
(RWPM #1 - #4)
Receive Protect
PRBS Monitor
(RPPM #1 - #4)
Receive
Auxiliary
PRBS Monitor
(RAPM #1 - #4)
Receive
Working
8B/10B Decoder
(RW8D #1 - #4)
Receive Protect
8B/10B Decoder
(RP8D #1 - #4)
Receive
Auxiliary
8B/10B Decoder
(RA8D #1 - #4)
Working Data
Recovery Unit
(WDRU #1 - #4)
Protect Data
Recovery Unit
(PDRU #1 - #4)
Auxiliary Data
Recovery Unit
(ADRU #1 - #4)
Receive
Working
LVDS Interface
(RWLV #1 - #4)
Receive Protect
LVDS Interface
(RPLV #1 - #4)
Receive
Auxiliary
LVDS Interface
(RALV #1 - #4)
Microprocessor
Interface
JTAG
TPWRK[4:1]
TNWRK[4:1]
TPPROT[4:1]
TNPROT[4:1]
TPAUX[4:1]
TNAUX[4:1]
RPWRK[4:1]
RNWRK[4:1]
RPPROT[4:1]
RNPROT[4:1]
RPAUX[4:1]
RNAUX[4:1]
PMC-2000329 (P1)
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERSINTERNAL USE
© Copyright PMC-Sierra, Inc. 2000

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