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Número de pieza | KM68V257E | |
Descripción | 32K X 8 Bit High Speed CMOS Static RAM | |
Fabricantes | Samsung Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de KM68V257E (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
No Preview Available ! omKM68V257E/EL, KM68V257EI/ELI
.cDocument Title
t4U32Kx8 Bit High-Speed CMOS Static RAM (3.3V Operating)
eOperated at Commercial and Industrial Temperature Range.
heRevision History
taSRev.No.
aRev. 0.0
www.D mRev. 1.0
History
Initial Draft
Release to Final Data Sheet
1. Delete Preliminary
2. Delete Data Retention
3. Relex Standby current
Item Previous
Isb1 0.3mA
Current
0.5mA
2mA
Remark
L-ver.
Normal
CMOS SRAM
Draft Data
Aug. 1. 1998
Sep. 7. 1998
Remark
Preliminary
Final
www.DataSheet4U.cotaSheet4U.comThe attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the
aspecifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any ques-
.Dtions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
www- 1 -
Revision 0.0
August 1998
1 page KM68V257E/EL, KM68V257EI/ELI
WRITE CYCLE
Parameter
Write Cycle Time
Chip Select to End of Write
Address Setup Time
Address Valid to End of Write
Write Pulse Width(OE High)
Write Pulse Width(OE Low)
Write Recovery Time
Write to Output High-Z
Data to Write Time Overlap
Data Hold from Write Time
End Write to Output Low-Z
Symbol
tWC
tCW
tAS
tAW
tWP
tWP1
tWR
tWHZ
tDW
tDH
tOW
KM68V257E-12
Min Max
12 -
8-
0-
8-
8-
12 -
0-
06
6-
0-
0-
NOTE : The above parameters are also guaranteed at industrial temperature range.
KM68V257E-15
Min Max
15 -
9-
0-
9-
9-
15 -
0-
07
7-
0-
0-
CMOS SRAM
KM68V257E-20
Min Max
20 -
10 -
0-
10 -
10 -
20 -
0-
08
8-
0-
0-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
TIMMING DIAGRAMS
TIMING WAVEFORM OF READ CYCLE(1) (Address Controlled, CS=OE=VIL, WE=VIH)
Address
Data Out
tOH
Previous Valid Data
tAA
tRC
Valid Data
TIMING WAVEFORM OF READ CYCLE(2) (WE=VIH)
Address
CS
OE
Data out
VCC
Current
ICC
ISB
tAA
tCO
tOE
tOLZ
tLZ(4,5)
tPU
50%
tRC
tHZ(3,4,5)
tOHZ
Valid Data
tOH
tPD
50%
-5-
Revision 0.0
August 1998
5 Page |
Páginas | Total 8 Páginas | |
PDF Descargar | [ Datasheet KM68V257E.PDF ] |
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