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Número de pieza SSD1815B
Descripción LCD Segment / Common Driver with Controller
Fabricantes ETC 
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SOLOMON SYSTECH
SEMICONDUCTOR TECHNICAL DATA
SSD1815B
Advance Information
LCD Segment / Common Driver
with Controller
CMOS
SSD1815B is a single-chip CMOS LCD drivers with controllers for dot-matrix graphic liquid crystal display system.
SSD1815B is capable to drive 132 Segments, 64 Commons and 1 icon line by its 197 high voltage driving output.
SSD1815B display data directly from their internal 132 x 65 bits Graphic Display Data RAM (GDDRAM). Data/Commands
are sent from common MCU through 8-bit Parallel or Serial Interface. The selection of whether 6800- or 8080-series compatible
Parallel Interface or Serial Peripheral Interface is done by hardware pins configuration.
SSD1815B embeds a DC-DC Converter, an On-Chip Bias Divider and an On-Chip Oscillator which reduce the number of
external components. With the advanced design on minimizing power consumption and die/package layout, SSD1815B is suit-
able for any portable battery-driven applications requiring a long operation period with a compact size.
This document contains information on a new product. Specifications and information herein and subject to change without notice.
Copyright © 2001 SOLOMON Systech Limited
Rev 1.6
07/2002

1 page




SSD1815B pdf
Table 2 SSD1815B Gold Bump Die Pad Coordinates
PAD #
NAME
1 ROW53
2 ROW54
3 ROW55
4 ROW56
5 ROW57
6 ROW58
7 ROW59
8 ROW60
9 ROW61
10 ROW62
11 ROW63
12 ICONS
13 N C
14 MSTAT
15 M
16 C L
17 /DOF
18 VSS
19 /CS1
20 CS2
21 VDD
22 /RES
23 D/C
24 VSS
25 R/W
26 E/RD
27 VDD
28 D 0
29 D 1
30 D 2
31 D 3
32 D 4
33 D 5
34 D 6
35 D 7
36 VDD
37 VDD
38 VDD
39 VDD
40 VSS
41 VSS
42 VSS
43 VSS1
44 VSS1
45 VSS1
46 VSS1
47 VEE
48 VEE
49 VEE
50 VEE
51 C3N
52 C3N
53 C3N
54 C3N
55 C1P
56 C1P
57 C1P
58 C1N
59 C1N
60 C1N
Die Size: 10.977mm
Bump Size:
Pad #
X [um]
1 - 12
43.5
13 - 103
61.7
104 - 115
43.5
X
-4958.45
-4882.15
-4805.85
-4729.55
-4653.25
-4576.95
-4500.65
-4424.35
-4348.05
-4271.75
-4195.45
-4119.15
-4000.50
-3911.60
-3822.70
-3733.80
-3644.90
-3556.00
-3467.10
-3378.20
-3289.30
-3200.40
-3111.50
-3022.60
-2933.70
-2844.80
-2755.90
-2667.00
-2578.10
-2489.20
-2400.30
-2311.40
-2222.50
-2133.60
-2044.70
-1955.80
-1866.90
-1778.00
-1689.10
-1600.20
-1511.30
-1422.40
-1333.50
-1244.60
-1155.70
-1066.80
-977.90
-889.00
-800.10
-711.20
-622.30
-533.40
-444.50
-355.60
-266.70
-177.80
-88.90
0.00
88.90
177.80
X
Y [um]
101.6
61.7
101.6
Y
-751.98
-751.98
-751.98
-751.98
-751.98
-751.98
-751.98
-751.98
-751.98
-751.98
-751.98
-751.98
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
1.912mm
PAD #
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
NAME
C2N
C2N
C2N
C2N
C2P
C2P
C2P
VSS
VSS
VFS
VFS
VDD
VDD
VL2
VL2
VL3
VL3
VL3
VL4
VL4
VL4
VL5
VL5
VL6
VL6
VL6
VF
VF
VDD
VDD
NC
NC
VDD
M/S
CLS
VSS
C68/80
P/S
VDD
/HPM
VSS
IRS
VDD
ROW31
ROW30
ROW29
ROW28
ROW27
ROW26
ROW25
ROW24
ROW23
ROW22
ROW21
ROW20
X
266.70
355.60
444.50
533.40
622.30
711.20
800.10
889.00
977.90
1066.80
1155.70
1244.60
1333.50
1422.40
1511.30
1600.20
1689.10
1778.00
1866.90
1955.80
2044.70
2133.60
2222.50
2311.40
2400.30
2489.20
2578.10
2667.00
2755.90
2844.80
2933.70
3022.60
3111.50
3200.40
3289.30
3378.20
3467.10
3556.00
3644.90
3733.80
3822.70
3911.60
4000.50
4119.15
4195.45
4271.75
4348.05
4424.35
4500.65
4576.95
4653.25
4729.55
4805.85
4882.15
4958.45
Pad #
X [um]
Y [um]
Pad #
116 - 136
101.6
43.5 137 - 268
Gold bump width tolerance: +/- 3um.
Y
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-771.93
-751.98
-751.98
-751.98
-751.98
-751.98
-751.98
-751.98
-751.98
-751.98
-751.98
-751.98
-751.98
X [um]
43.5
PAD #
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
NAME
ROW19
ROW18
ROW17
ROW16
ROW15
ROW14
ROW13
ROW12
ROW11
ROW10
ROW9
ROW8
ROW7
ROW6
ROW5
ROW4
ROW3
ROW2
ROW1
ROW0
ICONS
X
5285.18
5285.18
5285.18
5285.18
5285.18
5285.18
5285.18
5285.18
5285.18
5285.18
5285.18
5285.18
5285.18
5285.18
5285.18
5285.18
5285.18
5285.18
5285.18
5285.18
5285.18
Y
-768.78
-692.48
-616.18
-539.88
-463.58
-387.28
-310.98
-234.68
-158.38
-82.08
-5.78
70.53
146.83
223.13
299.43
375.73
452.03
528.33
604.63
680.93
757.23
Y
PIN268
PIN 1
(0,0)
PIN137
x
PIN115
Die Size: 10.977mm X 1.912mm
Bump Height:
- nominal: 18um
- tolerance:<4um (within die)
<6um (within wafer)
<8um (within lot)
Unit in um unless otherwise specified.
Y [um]
101.6
Pad #
269 - 289
X [um]
101.6
Y [um]
43.5
SSD1815B
6
Rev 1.6
07/2002
SOLOMON

5 Page





SSD1815B arduino
Oscillator Circuit
This module is an On-Chip low power RC oscillator circuitry (Figure 4). The oscillator generates the clock for the DC-DC
voltage converter. This clock is also used in the Display Timing Generator.
enable
Oscillation Circuit
Oscillator enable
(CLS)
enable
Buffer
(CL)
OSC1
Internal resistor
OSC2
Figure 4 Oscillator Circuitry
LCD Driving Voltage Generator and Regulator
This module generates the LCD voltage required for
display driving output. With reference to VDD, it takes a sin-
gle supply input, VSS, and generate necessary voltage lev-
els. This block consists of:
1. 2X, 3X and 4X DC-DC voltage converter
The built-in DC-DC voltage converter is used to gener-
ate the large negative voltage supply with reference to VDD
from the voltage input (VSS1). SSD1815B is possible to
produce 2X, 3X or 4X boosting from the potential different
between VSS1 - VDD.
Detail configurations of the DC-DC converter for differ-
ent boosting multiples are given in Figure 5.
2. Voltage Regulator (Voltages referenced to VDD)
The feedback gain control for LCD driving contrast
curves can be selected by IRS pin to either internal (IRS pin
= H) or external (IRS pin = L).
If internal resistor network is enabled, eight settings
can be selected through software command.
If external control is selected, external resistors are re-
quired to be connected between VDD and VF (R1), and be-
tween VF and VL6 (R2). See application circuit diagrams for
detail connections.
SSD1815B
12
Rev 1.6
07/2002
VSS1 VEE
SSD1815B
C3N C1P C1N C2P C2N
++
C1 C1
2X Boosting Configuration
VSS1 VEE
SSD1815B
C3N C1P C1N C2P C2N
+ ++
C1 C1 C1
3X Boosting Configuration
VSS1 VEE
SSD1815B
C3N C1P C1N C2P C2N
+
++
+
C1
C1 C1
C1
4X Boosting Configuration
Remarks:
1. C1 = 0.47 - 1.0uF
2. Boosting input from V SS1.
3. VSS1 should be lower potential than or equal to VSS
4. All voltages are referenced to V DD
Figure 5 DC-DC Converter Configurations
SOLOMON

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