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PDF LT1813DMS8 Data sheet ( Hoja de datos )
| Número de pieza | LT1813DMS8 | |
| Descripción | Dual 3mA/ 100MHz/ 750V/us Operational Amplifier | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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FEATURES
s 100MHz Gain Bandwidth
s 750V/µs Slew Rate
s 3.6mA Maximum Supply Current per Amplifier
s 8nV/√Hz Input Noise Voltage
s Unity-Gain Stable
s 1.5mV Maximum Input Offset Voltage
s 4µA Maximum Input Bias Current
s 400nA Maximum Input Offset Current
s 40mA Minimum Output Current, VOUT = ±3V
s ±3.5V Minimum Input CMR, VS = ±5V
s Specified at ±5V, Single 5V
s Available in MS8 and SO-8 Packages
U
APPLICATIO S
s Wideband Amplifiers
s Buffers
s Active Filters
s Video and RF Amplification
s Cable Drivers
s Data Acquisition Systems
LT1813
Dual 3mA, 100MHz, 750V/µs
Operational Amplifier
DESCRIPTIO
The LT®1813 is a low power, high speed, very high slew
rate operational amplifier with excellent DC performance.
The LT1813 features reduced supply current, lower input
offset voltage, lower input bias current and higher DC gain
than other devices with comparable bandwidth. The circuit
topology is a voltage feedback amplifier with the slewing
characteristics of a current feedback amplifier.
The output drives a 100Ω load to ±3.5V with ±5V supplies.
On a single 5V supply, the output swings from 1.1V to 3.9V
with a 100Ω load connected to 2.5V. The amplifier is stable
with a 1000pF capacitive load which makes it useful in
buffer and cable driver applications.
The LT1813 is manufactured on Linear Technology’s
advanced low voltage complementary bipolar process.
For higher supply voltage single, dual and quad opera-
tional amplifiers with up to 70MHz gain bandwidth, see the
LT1351 through LT1365 data sheets.
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATIO
4MHz, 4th Order Butterworth Filter
232Ω
232Ω
VIN
665Ω
220pF
– 47pF
1/2 LT1813
+
274Ω
274Ω 562Ω
470pF
– 22pF
1/2 LT1813
+
VOUT
1813 TA01
Filter Frequency Response
10
0
–10
–20
–30
–40
–50
–60
–70 VS = ±5V
–80 VIN = 600mVP-P
PEAKING < 0.12dB
–90
0.1 1
10
FREQUENCY (MHz)
100
1813 TA02
1
1 page  
LT1813
ELECTRICAL CHARACTERISTICS The q denotes the specifications which apply over the temperature range
– 40°C ≤ TA ≤ 85°C. VS = ±5V, VCM = 0V unless otherwise noted (Notes 8, 9).
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX UNITS
AVOL Large-Signal Voltage Gain
VOUT Output Swing
IOUT Output Current
ISC Short-Circuit Current
SR Slew Rate
GBW Gain Bandwidth
VOUT = ±3V, RL = 500Ω
VOUT = ±3V, RL = 100Ω
RL = 500Ω, 30mV Overdrive
RL = 100Ω, 30mV Overdrive
VOUT = ±3V, 30mV Overdrive
VOUT = 0V, VIN = ±1V
AV = – 1 (Note 5)
f = 200kHz
q 0.8
q 0.6
q ±3.60
q ±3.15
q ±30
q ±55
q 350
q 60
V/mV
V/mV
V
V
mA
mA
V/µs
MHz
Channel Separation
IS Supply Current
VOUT, ±3V, RL = 100Ω
Per Amplifier
q 80
q
dB
5 mA
– 40°C ≤ TA ≤ 85°C, VS = 5V, VCM = 2.5V, RL to 2.5V unless otherwise noted (Notes 8, 9).
VOS Input Offset Voltage
(Note 4)
q 3.5 mV
Input VOS Drift
(Note 7)
q
10 30
µV/°C
IOS Input Offset Current
q 600 nA
IB Input Bias Current
q ±6 µA
Input Voltage Range (High)
q 3.5
V
Input Voltage Range (Low)
q 1.5 V
CMRR
AVOL
VOUT
IOUT
ISC
SR
GBW
Common Mode Rejection Ratio
Large-Signal Voltage Gain
Output Swing (High)
Output Swing (Low)
Output Current
Short-Circuit Current
Slew Rate
Gain Bandwidth
VCM = 1.5V to 3.5V
VOUT = 1.5V to 3.5V, RL = 500Ω
VOUT = 1.5V to 3.5V, RL = 100Ω
RL = 500Ω, 30mV Overdrive
RL = 100Ω, 30mV Overdrive
RL = 500Ω, 30mV Overdrive
RL = 100Ω, 30mV Overdrive
VOUT = 3.5V or 1.5V, 30mV Overdrive
VOUT = 2.5V, VIN = ±1V
AV = – 1 (Note 5)
f = 200kHz
q 70
q 0.6
q 0.4
q 3.7
q 3.5
q
q
q ±17
q ±40
q 125
q 50
dB
V/mV
V/mV
V
V
1.3 V
1.5 V
mA
mA
V/µs
MHz
Channel Separation
IS Supply Current
VOUT, 1.5V to 3.5V, RL = 100Ω
Per Amplifier
q 79
q
dB
5 mA
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Differential inputs of ±3V are appropriate for transient operation
only, such as during slewing. Large sustained differential inputs can cause
excessive power dissipation and may damage the part.
Note 3: A heat sink may be required to keep the junction temperature
below absolute maximum when the output is shorted indefinitely.
Note 4: Input offset voltage is pulse tested and is exclusive of warm-up
drift.
Note 5: Slew rate is measured between ±2V on the output with ±3V input
for ±5V supplies and 2VP-P on the output with a 3VP-P input for single 5V
supplies.
Note 6: Full power bandwidth is calculated from the slew rate:
FPBW = SR/2πVP.
Note 7: This parameter is not 100% tested.
Note 8: The LT1813C is guaranteed to meet specified performance from
0°C to 70°C and is designed, characterized and expected to meet these
extended temperature limits, but is not tested at – 40°C and 85°C. The
LT1813I is guaranteed to meet the extended temperature limits.
Note 9: The LT1813D is 100% production tested at 25°C. It is designed,
characterized and expected to meet the 0°C to 70°C specifications
although it is not tested or QA sampled at these temperatures. The
LT1813D is guaranteed functional from –40°C to 85°C but may not meet
those specifications.
5
5 Page 
LT1813
APPLICATIONS INFORMATION
Example: LT1813 in SO-8 at 70°C, VS = ±5V, RL = 100Ω
PDMAX = (10V)(4.5mA) + (2.5V)2/100Ω = 108mW
TJMAX = 70°C + (2 • 108mW)(150°C/W) = 102°C
Circuit Operation
The LT1813 circuit topology is a true voltage feedback
amplifier that has the slewing behavior of a current feed-
back amplifier. The operation of the circuit can be under-
stood by referring to the Simplified Schematic. The inputs
are buffered by complementary NPN and PNP emitter
followers which drive a 300Ω resistor. The input voltage
appears across the resistor generating currents that are
mirrored into the high impedance node.
Complementary followers form an output stage that buff-
ers the gain node from the load. The bandwidth is set by
the input resistor and the capacitance on the high imped-
ance node. The slew rate is determined by the current
available to charge the gain node capacitance. This current
is the differential input voltage divided by R1, so the slew
rate is proportional to the input. Highest slew rates are
therefore seen in the lowest gain configurations.
The RC network across the output stage is bootstrapped
when the amplifier is driving a light or moderate load and
has no effect under normal operation. When driving ca-
pacitive loads (or a low value resistive load) the network is
incompletely bootstrapped and adds to the compensation
at the high impedance node. The added capacitance slows
down the amplifier which improves the phase margin by
moving the unity-gain cross away from the pole formed by
the output impedance and the capacitive load. The zero
created by the RC combination adds phase to ensure that
the total phase lag does not exceed 180 degrees (zero
phase margin) and the amplifier remains stable. In this
way, the LT1813 is stable with up to 1000pF capacitive
loads in unity gain, and even higher capacitive loads in
higher closed-loop gain configurations.
WW
SI PLIFIED SCHEMATIC
V+
R1
300Ω
+IN
CC
RC
–IN OUT
C
V–
1813 SS
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet LT1813DMS8.PDF ] | |
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