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PDF LT1785A Data sheet ( Hoja de datos )

Número de pieza LT1785A
Descripción 60V Fault Protected RS485/RS422 Transceivers
Fabricantes Linear Technology 
Logotipo Linear Technology Logotipo



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LT1785/LT1785A
LT1791/LT1791A
60V Fault Protected
RS485/RS422 Transceivers
FEATURES
s Protected from Overvoltage Line Faults to ±60V
s Pin Compatible with LTC485 and LTC491
s High Input Impedance Supports Up to 128 Nodes
s No Damage or Latchup to ESD
IEC-1000-4-2 Level 4: ±15kV Air Discharge
IEC-1000-4-2 Level 2: ±4kV Contact Discharge
s Controlled Slew Rates for EMI Emissions Control
s Guaranteed High Receiver Output State for Floating,
Shorted or Inactive Inputs
s Outputs Assume a High Impedance When Off or
Powered Down
s Drives Low Cost, Low Impedance Cables
s Short-Circuit Protection on All Outputs
s Thermal Shutdown Protection
U
APPLICATIO S
s Industrial Control Data Networks
s CAN Bus Applications
s HVAC Controls
DESCRIPTIO
The LT®1785/LT1791 are half-duplex and full-duplex dif-
ferential bus transceivers for RS485 and RS422 applica-
tions which feature on-chip protection from overvoltage
faults on the data transmission lines. Receiver input and
driver output pins can withstand voltage faults up to ±60V
with respect to ground with no damage to the device.
Faults may occur while the transceiver is active, shut down
or powered off.
Data rates to 250kbaud on networks of up to 128 nodes are
supported. Controlled slew rates on the driver outputs
control EMI emissions and improve data transmission
integrity on improperly terminated lines. Drivers are speci-
fied to operate with inexpensive cables as low as 72
characteristic impedance.
The LT1785A/LT1791A devices have “fail-safe” receiver
inputs to guarantee a receiver output high for shorted,
open or inactive data lines. On-chip ESD protection elimi-
nates need for external protection devices.
The LT1785/LT1785A are available in 8-lead DIP and SO
packages and the LT1791/LT1791A in 14-lead DIP and SO
packages.
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATIO
RO1 RX
RE1
LT1785
DE1
DI1 TX
RO2 RX
RE2
LT1785
DE2
DI2 TX
VCC1
RTERM
GND1
VCC2
RTERM
GND2
1785/91 TA01
Normal Operation Waveforms at 250kBaud
RO
Y-Z
DI
1785/91 TA02
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LT1785A pdf
TYPICAL PERFORMANCE CHARACTERISTICS
LT1785/LT1785A
LT1791/LT1791A
Driver Propagation Delay
vs Temperature
1000
900
800
LH
700
600 HL
500
400
300
200
100
0
–40 –20
0 20 40 60
TEMPERATURE (°C)
80 100
1785/91 G04
LT1785 Input Characteristics
Pins A or B; DE = RE = 0V
1mA/DIV
– 60V
VA, VB
60V
1785/91 G07
LT1791 Driver Output Leakage
DE = 0V
LT1791 Receiver Input Current
vs VIN
1mA/DIV
200µA/DIV
– 60V
VOUT
60V
1785/91 G05
– 60V
60V
VIN 1785/91 G06
Supply Current vs Temperature
7
6 DRIVER AND
RECEIVER ON
5
RECEIVER ONLY
4
3
2
1
STANDBY
0
–40 –20 0 20 40 60
TEMPERATURE (°C)
80 100
1785/91 G08
Receiver Propagation Delay
vs Differential Input Voltage
700
600
HL VCM = –7V
500 HL VCM = 12V
400
300
LH VCM = 12V
200
LH VCM = –7V
100
0
01
23
4
VIN DIFFERENTIAL (V)
5
1785/91 G09
PIN FUNCTIONS
RO: Receiver Output. TTL level logic output. If the receiver
is active (RE pin low), RO is high if receiver input A B by
200mV. If A B by 200mV, then RO will be low. RO
assumes a high impedance output state when RE is high
or the part is powered off. RO is protected from output
shorts from ground to 6V.
RE: Receiver Output Enable. TTL level logic input. A logic
low on RE enables normal operation of the receiver output
RO. A logic high level at RE places the receiver output pin
RO into a high impedance state. If receiver enable RE and
driver enable DE are both in the disable state, the circuit
goes to a low power shutdown state. Placing either RE or
DE into its active state brings the circuit out of shutdown.
Shutdown state is not entered until a 3µs delay after both
RE and DE are disabled, allowing for logic skews in
toggling between transmit and receive modes of opera-
tion. For CAN bus applications, RE should be tied low to
prevent the circuit from entering shutdown.
DE: Driver Output Enable. TTL level logic input. A logic
high on DE enables normal operation of the driver outputs
(Y and Z on LT1791, A and B on LT1785). A logic low level
at DE places the driver output pins into a high impedance
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LT1785A arduino
LT1785/LT1785A
LT1791/LT1791A
PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted.
N Package
14-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.770*
(19.558)
MAX
14 13 12 11 10
9
8
0.255 ± 0.015*
(6.477 ± 0.381)
0.300 – 0.325
(7.620 – 8.255)
0.130 ± 0.005
(3.302 ± 0.127)
1 234 56 7
0.045 – 0.065
(1.143 – 1.651)
0.009 – 0.015
(0.229 – 0.381)
0.020
(0.508)
MIN
+0.035
0.325 –0.015
( )8.255
+0.889
–0.381
0.125
(3.175)
MIN
0.005
(0.125)
MIN
0.100 ± 0.010
(2.540 ± 0.254)
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
0.065
(1.651)
TYP
0.018 ± 0.003
(0.457 ± 0.076)
N14 1197
S Package
14-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.337 – 0.344*
(8.560 – 8.738)
14 13 12 11 10
9
8
0.228 – 0.244
(5.791 – 6.197)
0.150 – 0.157**
(3.810 – 3.988)
0.010
(0.254
0.020
0.508)
×
45°
0.008 – 0.010
(0.203 – 0.254)
1234567
0° – 8° TYP
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0.016 – 0.050
0.406 – 1.270
0.014 – 0.019
(0.355 – 0.483)
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0.050
(1.270)
TYP
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of circuits as described herein will not infringe on existing patent rights.
S14 0695
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