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PDF MC68HC05SR3 Data sheet ( Hoja de datos )
| Número de pieza | MC68HC05SR3 | |
| Descripción | High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller Units | |
| Fabricantes | Motorola Semiconductors | |
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MC68HC05SR3
MC68HC705SR3
Technical Data
M68HC05
Microcontrollers
www.DaMC68HC05SR3D/H
taRev. 2.1
S08/2005
heet4U.comfreescale.com
1 page  
MC68HC05SR3
MC68HC705SR3
High-density Complementary
Metal Oxide Semiconductor
(HCMOS) Microcontroller Units
All Trade Marks recognized. This document contains information on new products. Specifications and information herein are
subject to change without notice.
All products are sold on Freescale’s Terms & Conditions of Supply. In ordering a product covered by this document the
Customer agrees to be bound by those Terms & Conditions and nothing contained in this document constitutes or forms part
of a contract (with the exception of the contents of this Notice). A copy of Freescale’s Terms & Conditions of Supply is available
on request.
Freescale reserves the right to make changes without further notice to any products herein. Freescale makes no warranty,
representation or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale assume
any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including
without limitation consequential or incidental damages. “Typical” parameters which may be provided in Freescale data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating
parameters, including “Typicals”, must be validated for each customer application by customer’s technical experts. Freescale
does not convey any license under its patent rights nor the rights of others. Freescale products are not designed, intended,
or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to
support or sustain life, or for any other application in which the failure of the Freescale product could create a situation where
personal injury or death may occur. Should Buyer purchase or use Freescale products for any such unintended or
unauthorized application, Buyer shall indemnify and hold Freescale and its officers, employees, subsidiaries, affiliates, and
distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly
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alleges that Freescale was negligent regarding the design or manufacture of the part. Freescale, Inc. is an Equal
Opportunity/Affirmative Action Employer.
The Customer should ensure that it has the most up to date version of the document by contacting its local Freescale office.
This document supersedes any earlier documentation relating to the products referred to herein. The information contained
in this document is current at the date of publication. It may subsequently be updated, revised or withdrawn.
Freescale LTD., 2005
TPG
5 Page 
Paragraph
Number
TITLE
8
CPU CORE AND INSTRUCTION SET
Page
Number
8.1 Registers ...............................................................................................................8-1
8.1.1 Accumulator (A) ...............................................................................................8-1
8.1.2 Index register (X)..............................................................................................8-2
8.1.3 Program counter (PC) ......................................................................................8-2
8.1.4 Stack pointer (SP) ............................................................................................8-2
8.1.5 Condition code register (CCR).........................................................................8-2
8.2 Instruction set ........................................................................................................8-3
8.2.1 Register/memory Instructions ..........................................................................8-4
8.2.2 Branch instructions ..........................................................................................8-4
8.2.3 Bit manipulation instructions ............................................................................8-4
8.2.4 Read/modify/write instructions .........................................................................8-4
8.2.5 Control instructions ..........................................................................................8-4
8.2.6 Tables...............................................................................................................8-4
8.3 Addressing modes .................................................................................................8-11
8.3.1 Inherent............................................................................................................8-11
8.3.2 Immediate ........................................................................................................8-11
8.3.3 Direct................................................................................................................8-11
8.3.4 Extended..........................................................................................................8-12
8.3.5 Indexed, no offset.............................................................................................8-12
8.3.6 Indexed, 8-bit offset..........................................................................................8-12
8.3.7 Indexed, 16-bit offset........................................................................................8-12
8.3.8 Relative ............................................................................................................8-13
8.3.9 Bit set/clear ......................................................................................................8-13
8.3.10 Bit test and branch ...........................................................................................8-13
9
LOW POWER MODES
9.1 STOP Mode ...........................................................................................................9-1
9.2 WAIT Mode............................................................................................................9-1
9.3 SLOW Mode ..........................................................................................................9-3
9.4 Data-Retention Mode ............................................................................................9-3
10
OPERATING MODES
10.1 User Mode ...........................................................................................................10-1
10.2 Self-Check Mode .................................................................................................10-1
10.3 Bootstrap Mode ...................................................................................................10-3
MC68HC05SR3
TPG
Freescale
iii
11 Page | ||
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| PDF Descargar | [ Datasheet MC68HC05SR3.PDF ] | |
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