PDF SY100E417 Data sheet ( Hoja de datos )

Número de pieza	SY100E417
Descripción	QUINT LVPECL-TO-PECL OR PECL-TO-LVPECL TRANSLATOR
Fabricantes	Micrel Semiconductor
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No Preview Available ! QUINT LVPECL-TO-PECL OR PECL-TO-LVPECL TRANSLATOR SY100E417 FEATURES s 3.3V and 5V power supplies required s Also, supports LVPECL-to-PECL translation s 500ps propagation delays s Fully differential design s Differential line receiver capability s Available in 28-pin PLCC package BLOCK DIAGRAM D0 D0 D1 D1 D2 D2 D3 D3 D4 D4 VBB Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3 Q4 Q4 FUNCTION TABLE Function PECL-to-LVPECL LVPECL-to-PECL PECL-to-PECL LVPECL-to-LVPECL Vcc 5.0V 5.0V 5.0V 5.0V Vcco 3.3V 5.0V 5.0V 3.3V Vcc_VBB 5.0V 3.3V 5.0V 3.3V DESCRIPTION The SY100E417 is a quint LVPECL-to-PECL translator. It can also be used as a quint PECL-to-LVPECL translator. The device receives standard PECL signals and translates them to differential LVPECL output signals (or vice versa). The SY100E417 can also be used as a differential line receiver for PECL-to-PECL or LVPECL-to-LVPECL signals. However, please note that for the latter we will need two different power supplies. Please refer to Function Table for more details. A VBB output is provided for interfacing single ended input signals. If a single ended input is to be used, the VBB output should be connected to the Dn input and the active signal will drive the Dn input. When used, the VBB should be bypassed to VCC via a 0.01µF capacitor. The VBB is designed to act as a switching reference for the SY100E417 under single ended input conditions. As a result, the pin can only source/sink 0.5mA of current. To accomplish the PECL-to-LVPECL level translation, the SY100E417 requires three power rails. The VCC and VCC_VBB supply is to be connected to the standard PECL supply, the 3.3V supply is to be connected to the VCCO supply, and GND is connected to the system ground plane. Both the VCC and VCCO should be bypassed to ground with a 0.01µF capacitor. To accomplish the LVPECL-to-PECL level translation, the SY100E417 requires three power rails as well. The 5.0V supply is connected to the VCC and VCCO pins, 3.3V supply is connected to the VCC_VBB pin and GND is connected to the system ground plane. VCC_VBB is used to provide a proper VBB output level if a single ended input is used. VCC_VBB = 3.3V is only required for single-ended LVPECL input. For differential LVPECL input, VCC_VBB can be either 3.3V or 5.0V. Under open input conditions, the Dn input will be biased at a VCC/2 voltage level and the Dn input will be pulled to GND. This condition will force the "Qn" output low, ensuring stability. Rev.: B Amendment: /1 1 Issue Date: March, 1999 1 page Micrel 28 LEAD PLCC (J28-1) SY100E417 Rev. 03 MICREL-SYNERGY 3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA TEL + 1 (408) 980-9191 FAX + 1 (408) 914-7878 WEB http://www.micrel.com This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc. © 2000 Micrel Incorporated 5 5 Page

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