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PDF LPC47B37X Data sheet ( Hoja de datos )
| Número de pieza | LPC47B37X | |
| Descripción | 100 PIN ENHANCED SUPER I/O | |
| Fabricantes | Standard Microsystems | |
| Logotipo |  |
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LPC47B37x
100 Pin Enhanced Super I/O for LPC Bus with
SMBus Controller for Commercial Applications
FEATURES
• 3.3 Volt Operation (5V Tolerant)
• Floppy Disk Controller (Supports 2 FDCs)
• Multi-Mode Parallel Port
• Two UARTs
• 8042 Keyboard Controller
• SMBus Controller
• Programmable Wakeup Event Interface
(nIO_PME Pin)
• SMI Support (nIO_SMI Pin)
• GPIOs (39)
• Fan Speed Control Output
• Fan Tachometer Input
• ISA IRQ to Serial IRQ Conversion
• XNOR Chain
• PC99 and ACPI 1.0 Compliant
• ISA Plug-and-Play Compatible Register Set
• Intelligent Auto Power Management
• 2.88MB Super I/O Floppy Disk Controller
- Licensed CMOS 765B Floppy Disk
Controller
- Software and Register Compatible with
SMSC's Proprietary 82077AA
Compatible Core
- Configurable Open Drain/Push-Pull
Output Drivers
- Supports Vertical Recording Format
- 16-Byte Data FIFO
- 100% IBM® Compatibility
- Detects All Overrun and Underrun
Conditions
- Sophisticated Power Control Circuitry
(PCC) Including Multiple Powerdown
Modes for Reduced Power
Consumption
- DMA Enable Logic
- Data Rate and Drive Control Registers
- 480 Address, up to 15 IRQ and 3 DMA
Options
• Enhanced Digital Data Separator
- 2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps,
250 Kbps Data Rates
- Programmable Precompensation
Modes
• Keyboard Controller
- 8042 Software Compatible
- 8-Bit Microcomputer
- 2k Bytes of Program ROM
- 256 Bytes of Data RAM
- Four Open Drain Outputs Dedicated for
Keyboard/Mouse Interface
- Asynchronous Access to Two Data
Registers and One Status Register
- Supports Interrupt and Polling Access
- 8-Bit Counter Timer
- Port 92 Support
- Fast Gate A20 and KRESET Outputs
• Serial Ports
- Two Full Function Serial Ports
- High Speed NS16C550 Compatible
UARTs with Send/Receive 16-Byte
FIFOs
- Supports 230k and 460k Baud
- Programmable Baud Rate Generator
- Modem Control Circuitry
- 480 Address and 15 IRQ Options
- IrDA 1.0, HP-SIR, ASK IR Support
1 page  
PIN CONFIGURATION
GP40/DRVDEN0
GP41/DRVDEN1
nMTR0
nDSKCHG
nDS0
CLKI32
VSS
nDIR
nSTEP
nWDATA
nWGATE
nHDSEL
nINDEX
nTRK0
nWRTPRT
nRDATA
GP42/nIO_PME
VTR
CLOCKI
LAD0
LAD1
LAD2
LAD3
nLFRAME
nLDRQ
nPCI_RESET
nLPCPD
GP43/DDRC/FDC_PP
PCI_CLK
SER_IRQ
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
LPC47B37x
100 PIN QFP
80 nACK
79 BUSY
78 PE
77 SLCT
76 VSS
75 PD7
74 PD6
73 PD5
72 PD4
71 PD3
70 PD2
69 PD1
68 PD0
67 nSLCTIN
66 nINIT
65 VCC
64 GP37/nA20M
63 GP36/nKBDRST
62 GP35/IRQ14
61 GP34/IRQ12
60 VSS
59 MCLK
58 MDAT
57 KCLK
56 KDAT
55 GP33/FAN
54 GP32/SDAT
53 VCC
52 GP31/FAN_TACH
51 GP30/SCLK
5
5 Page 
Pins That Require External Pullup Resistors
The following pins require external pullup
resistors:
• KDAT
• KCLK
• MDAT
• MCLK
• GP36/KBDRST if KBDRST function is used
• GP37/A20M if A20M function is used
• GP20/P17/nDS1 If P17 function is used
• GP21/P16/IRQ6 if P16 or IRQ6 function is
used
• GP22/P12/nMTR1 if P12 function is used
• GP27/nIO_SMI if nIO_SMI function is used
as Open Collector Output
• GP42/nIO_PME if nIO_PME function is used
as Open Collector Output
• SER_IRQ
• GP40/DRVDEN0 if DRVDEN0 function is
used as Open Collector Output
• GP41/DRVDEN1 if DRVDEN1 function is
used as Open Collector Output
• GP10-GP17, GP21, GP 34, GP35 if IRQx
function is used
• nMTR0 if used as Open Collector Output
• nDS0 if used as Open Collector Output
• nDIR if used as Open Collector Output
• nSTEP if used as Open Collector Output
• nWDATA if used as Open Collector Output
• nWGATE if used as Open Collector Output
• nHDSEL if used as Open Collector Output
• nINDEX
• nTRK0
• nWRTPRT
• nRDATA
• nDSKCHG
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet LPC47B37X.PDF ] | |
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