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PDF SPL09A Data sheet ( Hoja de datos )
| Número de pieza | SPL09A | |
| Descripción | 5KB LCD CONTROLLER/DRIVER | |
| Fabricantes | SunPlus | |
| Logotipo |  |
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Preliminary
SPL09A
5KB LCD CONTROLLER/DRIVER
GENERAL DESCRIPTION
The SPL09A is a CMOS 8-bit single chip microprocessor, which contains RAM, ROM, I/Os, interrupt/wakeup
controller, timer and automatic display controller/driver for LCD. This chip is designed not only low power
consumption but also provides standby mode controlled by software for power saving. It is very suitable for LCD
hand-held products.
FEATURES
Built-in 8-bit CPU
96 bytes SRAM
5K bytes ROM
Max. CPU frequency: 2.0MHz @ 3V
CPU clock frequency is programmable,
1/2,1/4,1/8,or 1/16 of RC oscillator frequency
Wide operating voltage : 2.4V - 3.4V
3.6V - 5.5V
Provide 6 INT sources
Built-in 32.768KHz crystal oscillator
Crystal oscillator switches from strong to weak
mode automatically
Internal time base generator
Built-in RC oscillator
Only one resistor is needed
ÁOne 16 bits timer / counter
LCD controller
Max. 26 segments x 5 commons
1/2, 1/3 bias ; 1/2, 1/3, 1/4,1/5 duty
Provides useful display operation mode
Low Voltage Reset
Provides 2.2V low Voltage reset
Low power consumption
Operating current: 300 A/1.0MHz @ 3V
Provides standby function (stop all oscillators)
Very low current in Halt mode
In Halt mode: IHALT < 1 A @ 3V
10 general purpose I/Os
6 IO pins support Key wake-up mode
2 IO pins are shared with LCD segments
1 IO pin is shared with LCD common
BLOCK DIAGRAM
32.768KHz
ROSC
Interrupt/wakeup
Control
5K bytes
ROM
96 bytes
RAM
32.768KHz
Oscillator
&
Time base
One 16-bit
Auto reload
Timer
8-bit
RISC
Processor
LCD RAM
26 SEGMENTS X 5 COMMONS LCD DRIVER
IOCD3 - 0
(I/O)
IOEF5 - 0
(I/O)
COM4 - 0
SEG25 - 0
Sunplus Technology Co., Ltd.
1
Rev.: 0.1 1999.11.24
1 page  
Preliminary
SPL09A
LOW VOLTAGE RESET (2.2V)
Enable
Disable
LCD CHARGE PUMP CLOCK RATE
32KHz
4KHz
I/O AND LCD DRIVER
There are some examples shown as below:
LCD Dots
Segment
Common
Input/Output
Input/Output
130 26
5
IOCD1 - 0
IOEF4 - 0
125 25
5
IOCD2 - 0
IOEF4 - 0
96 24
4
IOCD3 - 0
IOEF5 - 0
Each of input/output ports IOCD3 - 2 can be optioned to LCD segments independently, and IOEF5 can be
optioned to LCD commons.
PIN DESCRIPTION
Mnemonic Type
SEG23 – 0
O
COM3 – 0
O
IOEF5 – 0
I/O
IOCD3 – 0
I/O
ROSC
I
RESET
I
X32I
I
X32O
O
TEST
I
VDD
I
VSS
I
VDD1, VDD2 I
CUP1, CUP2 I
LPWR
O
Description
LCD driver segment output
LCD driver common output
I/O port (IOEF5 can be optioned to COM4)
I/O port (IOCD3 can be optioned to SEG24, and IOCD2 can be optional to SEG25)
R-Oscillator input, connect to VDD through resistor
System reset input
32.768KHz crystal input (provide LCD frequency)
32.768KHz crystal output
TEST MODE
Positive supply voltage input
Ground Input
Inputs for setting LCD Bias
Inputs for setting LCD Bias
Regulated voltage output terminal for oscillators
Sunplus Technology Co., Ltd.
5
Rev.: 0.1 1999.11.24
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet SPL09A.PDF ] | |
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