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PDF SPLC100A1 Data sheet ( Hoja de datos )
| Número de pieza | SPLC100A1 | |
| Descripción | 40-CHANNEL SEG/COM LCD DRIVER | |
| Fabricantes | SunPlus | |
| Logotipo |  |
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SPLC100A1
40-CHANNEL SEG/COM LCD DRIVER
GENERAL DESCRIPTION
The SPLC100A1 is a Liquid Crystal Display driver that contains two sets of 20-bit bi-directional shift registers, 20
data latch flip-flops and 20 Liquid Crystal Display drivers. It also features 40-channel outputs that can be applied
as common or segment driver. The SPLC100A1 receives serial display data from a display control LSI,
converts it into parallel data and supplies liquid crystal display waveforms to the liquid crystal.
FEATURES
Liquid Crystal Display driver with serial/parallel
conversion function.
Serial transfer facilitates board design.
Capable of interfacing to liquid crystal display
controllers: HD43160AH, HD61830, HD44780,
HD44790, SPLC780
40 internal LCD drivers.
Internal serial/parallel conversion circuits:
— 20-bit shift register 2
— 20-bit latch 2
Power supply:
— Internal logic: 2.7V – 5.5V
— Liquid crystal display driver circuit: 3.0V – 11.0V
CMOS process.
BLOCK DIAGRAM
V1,V2
V3,V4
CL1
DL1
CL2
DL2
FCS
M
V1,V2
V5,V6
Y1 Y20
LCD Drivers
Latch signal
Data
20-bit latch
Shift signal 20-bit bidirectional shift register
Switching circuit
20-bit bidirectional shift register
Data
20-bit latch
Shift
direction
Data
Data
Shift
direction
LCD Drivers
SHL1
DR1
DR2
SHL2
Y21 Y40
Sunplus Technology Co., Ltd.
1
Rev.: 1.0 1999.10.04
1 page  
SPLC100A1
PIN DESCRIPTION
Mnemonic PIN No. Type
Description
VDD
22 I Positive power supply voltage input
VSS
32 I Ground input
VEE
29 I Power supply voltage for liquid crystal display drive
Y6 – 1
23-28 O Liquid crystal driver output ( Channel 1 )
Y20 – 7
8-21
Y27 – 21 1-7 O Liquid crystal driver output ( Channel 2 )
Y40 – 28 47-59
V1, V2
41,42 I Power supply for liquid crystal display drive ( Select level )
V3, V4
43,44 I Power supply for liquid crystal display drive (Non-select level for channel 1)
V5, V6
45,46 I Power supply for liquid crystal display drive (Non-select level for channel 2)
SHL1
38 I Selection of the shift direction of channel 1 shift register
SHL1 DL1 DR1
VDD Out
In
GND
In
Out
SHL2
39 I Selection of the shift direction of channel 2 shift register
SHL2 DL2 DR2
VDD Out
In
GND In
Out
DL1, DR1 33,34 I/O Data Input / Output of channel 1 shift register
DL2, DR2 35,36 I/O Data Input / Output of channel 2 shift register
M 37 I Alternated signal for liquid crystal driver output
CL1 30 I Latch signal for channel 1 ( ) *1
Used for channel 2 when FCS is GND
CL2 31 I Shift signal for channel 1 ( ) *1
Used for channel 2 when FCS is GND
FCS
40 I Mode select signal of channel 2. FCS signal exchanges the latch signal and
the shift of channel 2 and inverts M for channel 2.Thus, this signal exchanges
the function of channel 2.
FCS Level
Channel 2
Latch signal Shift signal
VDD
CL2
CL1
GND
CL1
CL2
*1 *1
M Polarity
M
M
Function
For common drive
For segment drive
*2
Notes: *1. and indicate the latches at rise and fall times, respectively.
*2. The output level relationship between channel 1 and channel 2 based on the FCS signal level as
follows:
Sunplus Technology Co., Ltd.
5
Rev.: 1.0 1999.10.04
5 Page 
PAD ASSIGNMENT AND LOCATIONS
PAD Assignment
SPLC100A1
Chip Size: 2152 m x 2380 m
This IC substrate should be connected to VDD
Note: To ensure IC function properly, please bond all of the VDD, VSS AVDD and AVSS pins.
Ordering Information
Product Number
SPLC100A1-nnnnV-C
Note1: Code number (nnnnV) is assigned for customer.
Note2: Code number (nnnn = 0000 - 9999); version (V = A - Z).
Package Type
Chip form
NOTE: SUNPLUS TECHNOLOGY GO., LTD reserves the right to make changes at any time without notice in
order to improve the design and performance to supply the best possible product.
Sunplus Technology Co., Ltd.
11
Rev.: 1.0 1999.10.04
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet SPLC100A1.PDF ] | |
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