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PDF MT90869 Data sheet ( Hoja de datos )
| Número de pieza | MT90869 | |
| Descripción | Flexible 16K Digital Switch (F16kDX) | |
| Fabricantes | Zarlink Semiconductor | |
| Logotipo |  |
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MT90869
Flexible 16K Digital Switch (F16kDX)
Data Sheet
Features
• 16,384-channel x 16,384-channel non-blocking
unidirectional switching.The Backplane and
Local inputs and outputs can be combined to
form a non-blocking switching matrix with 64
stream inputs and 64 stream outputs.
• 8,192-channel x 8,192-channel non-blocking
Backplane to Local stream switch.
• 8,192-channel x 8,192-channel non-blocking
Local to Backplane stream switch.
• 8,192-channel x 8,192-channel non-blocking
Backplane input to Backplane output switch.
• 8,192-channel x 8,192-channel non-blocking
Local input to Local output stream switch.
• Rate conversion on all data paths, Backplane to
Local, Local to Backplane, Backplane to
Backplane and Local to Local streams.
• Backplane port accepts 32 ST-BUS streams
with data rates of 2.048Mb/s, 4.096Mb/s,
8.192Mb/s or 16.384Mb/s in any combination,
or a fixed allocation of 16 streams at
32.768Mb/s.
• Local port accepts 32 ST-BUS streams with
data rates of 2.048Mb/s, 4.096Mb/s, 8.192Mb/s
December 2002
Ordering Information
MT90869AG 272 Ball - PBGA
-40 to +85oC
or 16.384Mb/s, in any combination.
• Per-stream channel and bit delay for Local input
streams.
• Per-stream channel and bit delay for Backplane
input streams.
• Per-stream advancement for Local output
streams.
• Per-stream advancement for Backplane output
streams.
• Constant throughput delay for frame integrity.
• Per-channel high impedance output control for
Local and Backplane streams.
• Per-channel driven-high output control for local
and backplane streams.
• High impedance-control outputs for external
drivers on backplane and local port.
VDD_IO VDD_CORE VSS (GND)
RESET
ODE
BSTi0-31
BSTo0-31
BCST0-3
BORS
FP8i
C8i
Backplane
Interface
Backplane Data Memories
(8,192 channels)
Backplane
Connection Memory
(8,192 locations)
Local
Connection Memory
(8,192 locations)
Local
Interface
Local
Interface
Backplane
Timing Unit
PLL
Local Data Memories
(8,192 channels)
Microprocessor Interface
and Internal Registers
Local
Timing
Unit
Test Port
LSTi0-31
LSTo0-31
LCST0-3
LORS
FP8o
FP16o
C8o
C16o
VDD_PLL
DS CS R/W A14-A0 DTA D15-D0 TMS TDi TDo TCK TRST
Figure 1 - MT90869 Functional Block Diagram
Zarlink Semiconductor Inc.
1
1 page  
Data Sheet
MT90869
Pin Description
Name
VDD_IO
VDD_CORE
VDD_PLL
VSS (GND)
BSTi0 - 15
BSTi16 - 31
BSTo0 - 15
Package
Coordinates
Description
D6, D11, D15, F4,
F17, K4, L17, R4,
R17, U6, U10, U15
A7, B4, B12, D14,
K1, K20, N3, P18,
T17, U16, V1, V5,
Y7, Y11, Y14
U12
A1, D4, D8, D13,
D17, H4, H17, J9,
J10, J11, J12, K9,
K10, K11, K12, L9,
L10, L11, L12, M9,
M10, M11, M12, N4,
N17, U4, U8, U11,
U13, U17
K3, L1, L2, L3, L4,
M1, M2, M3, M4, N1,
N2, P1, P2, P3, P4,
R1
R2, R3, T1, T2, T3,
T4, U1,W1, W2, W3,
Y1, Y2, U5, V4, W4,
Y4
C5, B5, A5 C4, A4,
A3, B1, B2, B3, C1,
C2, D1, D2, D3, E1,
E2
Power Supply for Periphery Circuits: +3.3V
Power Supply for Core Logic Circuits: +1.8V
Power Supply for Analogue PLL: +1.8V
Ground
Backplane Serial Input Streams 0 to 15 (5V Tolerant, Internal pull-down). In
Non-32Mb/s Mode, these pins accept serial TDM data streams at a data-rate of:-
16.384 Mb/s (with 256 channels per stream),
8.192 Mb/s (with 128 channels per stream),
4.096 Mb/s (with 64 channels per stream), or
2.048Mb/s (with 32 channels per stream).
The data-rate is independently programmable for each input stream.
In 32Mb/s Mode, these pins accept serial TDM data streams at a fixed data-rate of
32.768 Mb/s (with 512 channels per stream).
Backplane Serial Input Streams 16 to 31 (5V Tolerant, Internal pull-down).
In Non-32Mb/s Mode, these pins accept serial TDM data streams at a data-rate
of:-
16.384 Mb/s (with 256 channels per stream),
8.192 Mb/s (with 128 channels per stream),
4.096 Mb/s (with 64 channels per stream), or
2.048Mb/s (with 32 channels per stream).
The data-rate is independently programmable for each input stream.
In 32Mb/s Mode, these pins are unused and should be externally connected to a
defined logic level.
Backplane Serial Output Streams 0 to 15 (5V Tolerant, Three-state Outputs).
In Non-32Mb/s Mode, these pins output serial TDM data streams at a data-rate of:-
16.384 Mb/s (with 256 channels per stream),
8.192 Mb/s (with 128 channels per stream),
4.096 Mb/s (with 64 channels per stream), or
2.048Mb/s (with 32 channels per stream).
The data-rate is independently programmable for each output stream.
In 32Mb/s Mode, these pins output serial TDM data streams at a fixed data-rate of
32.768 Mb/s (with 512 channels per stream).
Refer to descriptions of the BORS and ODE pins for control of the output High or
High-Impedance state.
Zarlink Semiconductor Inc.
5
5 Page 
Data Sheet
2.0 Functional Description
2.1 Switching Configuration
MT90869
The device supports five switching configurations. (1) Backplane-to-Local, (2) Local-to-Backplane, (3) Backplane-
to-Backplane, (4) Local-to-Local, and (5) Uni-directional switch. The following sections describe the switching paths
in detail. Configurations (1) - (4) enable a non-blocking switch with 8192 input channels and 8192 output channels
at Backplane stream data-rates of 16.384Mb/s or 32.768 Mb/s, and Local stream data-rates of 16.384Mb/s. The
switch paths of Configurations (1) to (4) may be operated simultaneously.
2.1.1
Backplane-to-Local path
The device can provide data switching between the Backplane input port and the Local output port. The Local
Connection Memory determines the switching configurations.
2.1.2
Local-to-Backplane path
The device can provide data switching between the Local input port and the Backplane output port. The Backplane
Connection Memory determines the switching configurations.
2.1.3
Backplane-to-Backplane path
The device can provide data switching between the Backplane input and output ports. The Backplane Connection
Memory determines the switching configurations.
2.1.4
Local-to-Local path
The device can provide data switching between the Local input and output ports. The Local Connection Memory
determines the switching configurations.
2.1.5
Uni-directional Switch
The device may be optionally configured to provide a 16,384 x 16,384 uni-directional switch by grouping together
all input and all output streams. All streams may be operated at a data-rate of 16.384Mb/s, or a combination of
16.384Mb/s and 32.768 Mb/s. Lower data-rates may be employed with a corresponding reduction in switch
capacity.
2.2 Port Data Rate Modes and Selection
The selection of individual stream data-rates is summarized in Table 1.
2.2.1
Local Port Rate Selection
The local port has 32 input (LSTi0-31) and 32 output (LSTo0-31) data streams. All input and output streams may
be individually selected for operation at a data rate of either 2.048Mb/s, 4.096Mb/s, 8.192Mb/s or 16.384Mb/s. The
timing of the input and output clocks and frame pulses are shown in Figure 6, Local Port Timing Diagram for 2,4,8
and 16Mb/s stream rates.
2.2.1.1
Local Input Port
The bit rate for each input stream is selected by writing to a dedicated Local Input Bit Rate Register (LIBRR0-31).
Refer to Table 41, Local Input Bit Rate Register (LIBRRn) Bits.
Zarlink Semiconductor Inc.
11
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| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MT90869.PDF ] | |
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