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PDF MCP1726 Data sheet ( Hoja de datos )
| Número de pieza | MCP1726 | |
| Descripción | Low Quiescent Current LDO Regulator | |
| Fabricantes | Microchip Technology | |
| Logotipo |  |
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MCP1726
1A, Low-Voltage, Low Quiescent Current LDO Regulator
Features:
• 1A Output Current Capability
• Input Operating Voltage Range: 2.3V to 6.0V
• Adjustable Output Voltage Range: 0.8V to 5.0V
• Standard Fixed Output Voltages:
- 0.8V, 1.2V, 1.8V, 2.5V, 3.0V, 3.3V, 5.0V
• Low Dropout Voltage: 220 mV typical at 1A
• Typical Output Voltage Tolerance: ±0.5%
• Stable with 1.0 µF Ceramic Output Capacitor
• Fast Response to Load Transients
• Low Supply Current: 140 µA (typical)
• Low Shutdown Supply Current: 0.1 µA (typical)
• Adjustable Delay on Power Good Output
• Short-Circuit Current Limiting and
Overtemperature Protection
• 3x3 DFN-8 and SOIC-8 Package Options
Applications:
• High-Speed Driver Chipset Power
• Networking Backplane Cards
• Notebook Computers
• Network Interface Cards
• Palmtop Computers
• 2.5V to 1.XV Regulators
Package Types
Description:
The MCP1726 is a 1A Low Dropout (LDO) linear
regulator that provides high current and low output
voltages in a very small package. The MCP1726
comes in fixed or adjustable output voltage versions,
with an output voltage range of 0.8V to 5.0V. The 1A
output current capability and low output voltage
capability make the MCP1726 a good choice for new
sub-1.8V output voltage LDO applications that have
high current demands.
The MCP1726 is stable using ceramic output
capacitors that inherently provide lower output noise
and reduce the size and cost of the entire regulator
solution. Only 1 µF of output capacitance is needed to
stabilize the LDO.
Using CMOS construction, the quiescent current
consumed by the MCP1726 is typically less than
140 µA over the entire input voltage range, making it
attractive for portable computing applications that
demand high output current. When the MCP1726 is
shut down, the quiescent current is reduced to less
than 0.1 µA.
The scaled-down output voltage is internally monitored
and a Power Good (PWRGD) output is provided when
the output is within 92% of regulation (typical). An
external capacitor can be used on the CDELAY pin to
adjust the delay from 1 ms to 300 ms.
The overtemperature and short-circuit current limiting
provide additional protection for the LDO during system
fault conditions.
MCP1726-ADJ
SOIC
MCP1726-xx
SOIC
MCP1726-ADJ
3x3 DFN
MCP1726-xx
3x3 DFN
VIN 1
8 VOUT
VIN 1
8 VOUT
VIN 1
8 VOUT
VIN 1
8 VOUT
VIN 2
SHDN 3
GND 4
7 ADJ
VIN 2
6 CDELAY SHDN 3
5 PWRGD GND 4
7 VOUT
VIN 2 EP 7 ADJ
VIN 2 EP 7 VOUT
6 CDELAY SHDN 3 9 6 CDELAY SHDN 3 9 6 CDELAY
5 PWRGD GND 4
5 PWRGD GND 4
5 PWRGD
2005-2014 Microchip Technology Inc.
DS20001936D-page 1
1 page  
MCP1726
DC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise noted, VIN = (VR + 0.5V) or 2.3V, whichever is greater, IOUT = 1 mA,
CIN = COUT = 4.7 µF (X7R Ceramic), TA = +25°C. Boldface type applies for junction temperatures, TJ (Note 7), of -40°C to +125°C.
Parameters
Sym.
Min.
Typ.
Max.
Units
Conditions
Power Good Characteristics
Input Voltage Operating Range
VPWRGD_VIN
1.0
—
6.0
V TA = +25°C
for Valid PWRGD
1.2 — 6.0
TA = -40°C to +125°C
ISINK = 100 µA
PWRGD Threshold Voltage
PWRGD_THF
88
92
96 % VOUT < 2.5V, Falling Edge
(Referenced to VOUT)
89 92 95 % VOUT > 2.5V, Falling Edge
PWRGD_THR
89
94
98 % VOUT < 2.5V, Rising Edge
90 93 96 % VOUT > 2.5V, Rising Edge
PWRGD Output Voltage Low
VPWRGD_L
—
0.2
0.4
V IPWRGD SINK = 1.2 mA
PWRGD Leakage
PWRGD_LK
—
0.1
— µA VPWRGD = VIN = 6.0V
PWRGD Time Delay
TPG — 200 — µs CDELAY = OPEN
10 30 55 ms CDELAY = 0.01 µF
— 300 — ms CDELAY = 0.1 µF
Detect Threshold to PWRGD
TVDET-PWRGD
—
170
—
µs
Active Time Delay
Shutdown Input
Logic-High Input
Logic-Low Input
SHDN Input Leakage Current
VSHDN-HIGH
45
—
— %VIN VIN = 2.3V to 6.0V
VSHDN-LOW
—
—
15 %VIN VIN = 2.3V to 6.0V
SHDNILK
-0.1 ±0.001 +0.1
µA VIN = 6V, SHDN = VIN,
SHDN = GND
AC Performance
Output Delay from SHDN
TOR
100 µs SHDN = GND to VIN
VOUT = GND to 95% VR
Output Noise
eN — 2.0 — µV/Hz IOUT = 200 mA, f = 1 kHz,
COUT = 1 µF (X7R Ceramic),
VOUT = 2.5V
Power Supply Ripple Rejection
Ratio
PSRR
— 54 — dB f = 100 Hz, COUT = 10 µF,
IOUT = 100 mA,
VINAC = 30 mV pk-pk,
CIN = 0 µF
Thermal Shutdown Temperature
TSD
— 150 — °C IOUT = 100 µA,
VOUT = 1.8V, VIN = 2.8V
Thermal Shutdown Hysteresis
TSD
— 10 — °C IOUT = 100 µA,
VOUT = 1.8V, VIN = 2.8V
Note 1:
2:
3:
4:
The minimum VIN must meet two conditions: VIN 2.3V and VIN VR + 2.5% VDROPOUT.
VR is the nominal regulator output voltage for the fixed cases. VR = 1.2V, 1.8V, etc. VR is the desired set point output
voltage for the adjustable cases. VR = VADJ x ((R1/R2) + 1). See Figure 4-1.
TCVOUT = (VOUT-HIGH – VOUT-LOW) x 106/(VR x Temperature). VOUT-HIGH is the highest voltage measured over the
temperature range. VOUT-LOW is the lowest voltage measured over the temperature range.
Load regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is
tested over a load range from 1 mA to the maximum specified output current.
5: Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its
nominal value that was measured with an input voltage of VIN = VR + 0.5V.
6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction
temperature and the thermal resistance from junction to air. (i.e., TA, TJ, JA). Exceeding the maximum allowable power
dissipation will cause the device operating junction temperature to exceed the maximum 150°C rating. Sustained
junction temperatures above 125°C can impact device reliability.
7: The junction temperature is approximated by soaking the device under test at an ambient temperature equal to the
desired junction temperature. The test time is small enough such that the rise in the junction temperature over the
ambient temperature is not significant.
2005-2014 Microchip Technology Inc.
DS20001936D-page 5
5 Page 
MCP1726
Note: Unless otherwise indicated, VIN = VOUT + 0.5V, IOUT = 1 mA and TA = +25°C.
80
70
60
50
40
30
20 COUT =10 µF
10 CIN = 0 µF
IOUT = 100 mA
0
0.01
0.1
1 10
Frequency (kHz)
VOUT = 2.5V
VIN = 3.3V
100 1000
FIGURE 2-25:
Power Supply Ripple
Rejection (PSRR) vs. Frequency (VOUT = 2.5V
Fixed).
VOUT
SHDN
PWRGD
FIGURE 2-28:
from Shutdown.
2.5V (Adjustable) Start-Up
80
70
60
50
40
30
20 COUT =22 µF
10 CIN = 0 µF
IOUT = 100 mA
0
0.01
0.1
1 10
Frequency (kHz)
VOUT = 2.5V
VIN = 3.3V
100 1000
FIGURE 2-26:
Power Supply Ripple
Rejection (PSRR) vs. Frequency (VOUT = 2.5V
Fixed).
VOUT
VIN
PWRGD
FIGURE 2-29:
Power Good (PWRGD)
Timing with CBYPASS of 1000 pF.
VOUT
VIN
PWRGD
FIGURE 2-27:
from VIN.
2.5V (Adjustable) Start-Up
VOUT
VIN
PWRGD
FIGURE 2-30:
Power Good (PWRGD)
Timing with CBYPASS of 0.01 µF.
2005-2014 Microchip Technology Inc.
DS20001936D-page 11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MCP1726.PDF ] | |
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