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PDF STK10C68 Data sheet ( Hoja de datos )
| Número de pieza | STK10C68 | |
| Descripción | 8K x 8 nvSRAM | |
| Fabricantes | Simtek | |
| Logotipo |  |
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STK10C68
STK10C68-M SMD#5962-93056
8K x 8 nvSRAM
QuantumTrap™ CMOS
Nonvolatile Static RAM
FEATURES
• 25ns, 35ns, 45ns and 55ns Access Times
• STORE to Nonvolatile Elements Initiated by
Hardware
• RECALL to SRAM Initiated by Hardware or
Power Restore
• Automatic STORE Timing
• 10mA Typical ICC at 200ns Cycle Time
• Unlimited READ, WRITE and RECALL Cycles
• 1,000,000 STORE Cycles to Nonvolatile Ele-
ments (Industrial/Commercial)
• 100-Year Data Retention (Industrial/Commer-
cial)
• Commercial, Industrial and Military Tempera-
tures
• 28-Pin DIP, SOIC and LCC Packages
BLOCK DIAGRAM
QUANTUM TRAP
128 x 512
A5
A6 STORE
A7 STATIC RAM
A8
ARRAY
RECALL
A9 128 x 512
A11
A12
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
COLUMN I/O
COLUMN DEC
A0 A1 A2 A3 A4 A10
DESCRIPTION
The Simtek STK10C68 is a fast static RAM with a nonvol-
atile element incorporated in each static memory cell. The
SRAM can be read and written an unlimited number of
times, while independent nonvolatile data resides in Non-
volatile Elements. Data may easily be transferred from
the SRAM to the Nonvolatile Elements (the STORE oper-
ation), or from the Nonvolatile Elements to the SRAM
(the RECALL operation), using the NE pin. Transfers
from the Nonvolatile Elements to the SRAM (the
RECALL operation) also take place automatically on
restoration of power. The STK10C68 combines the high
performance and ease of use of a fast SRAM with nonvol-
atile data integrity.
The STK10C68 features industry-standard pinout for non-
volatile RAMs. MIL-STD-883 and Standard Military Draw-
ing (SMD #5962-93056) devices are available.
PIN CONFIGURATIONS
NE
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 VCC
27 W
26 NC
25 A8
24 A9
23 A11
22 G
21 A10
20 E
19 DQ7
18 DQ6
17 DQ5
16 DQ4
15 DQ3
28 - LCC
28 - DIP
28 - SOIC
STORE/
RECALL
CONTROL
G
NE
E
W
PIN NAMES
A0 - A12
W
DQ0 - DQ7
E
G
NE
VCC
VSS
Address Inputs
Write Enable
Data In/Out
Chip Enable
Output Enable
Nonvolatile Enable
Power (+ 5V)
Ground
September 2003
1 Document Control # ML0006 rev 0.1
1 page  
STORE INHIBIT/POWER-UP RECALL
SYMBOLS
NO.
Standard
PARAMETER
22 tRESTORE
23 tSTORE
24 VSWITCH
25 VRESET
Power-up RECALL Duration
STORE Cycle Duration
Low Voltage Trigger Level
Low Voltage Reset Level
Note k: tRESTORE starts from the time VCC rises above VSWITCH.
STORE INHIBIT/POWER-UP RECALL
VCC
24 5V
VSWITCH
VR2E5SET
STORE INHIBIT
POWER-UP RECALL
DQ (DATA OUT)
22
tRESTORE
STK10C68
(VCC = 5.0V + 10%)
STK10C68
MIN MAX
550
10
4.0 4.5
3.6
UNITS NOTES
µs k
ms
V
V
POWER-UP
RECALL
BROWN OUT
STORE INHIBIT
NO RECALL
(VCC DID NOT GO
BELOW VRESET)
BROWN OUT
STORE INHIBIT
NO RECALL
(VCC DID NOT GO
BELOW VRESET)
BROWN OUT
STORE INHIBIT
RECALL WHEN
VCC RETURNS
ABOVE VSWITCH
September 2003
5 Document Control # ML0006 rev 0.1
5 Page 
Document Revision History
Revision
0.0
0.1
Date
December 2002
September 2003
STK10C68
Summary
Combined commercial, industrial and military data sheets. Removed 20 nsec device.
Added lead-free lead finish
September 2003
11 Document Control # ML0006 rev 0.1
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet STK10C68.PDF ] | |
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