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Número de pieza | MTB3N120E | |
Descripción | TMOS POWER FET 3.0 AMPERES 1200 VOLTS | |
Fabricantes | Motorola Semiconductors | |
Logotipo | ||
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SEMICONDUCTOR TECHNICAL DATA
Order this document
by MTB3N120E/D
™Designer's Data Sheet
TMOS E-FET.™
High Energy Power FET
MTB3N120E
Motorola Preferred Device
D2PAK for Surface Mount
N–Channel Enhancement–Mode Silicon Gate
TMOS POWER FET
3.0 AMPERES
The D2PAK package has the capability of housing a larger die
than any existing surface mount package which allows it to be used
1200 VOLTS
RDS(on) = 5.0 OHM
in applications that require the use of surface mount components
with higher power and lower RDS(on) capabilities. This high voltage
MOSFET uses an advanced termination scheme to provide
enhanced voltage–blocking capability without degrading perfor-
®
mance over time. In addition, this advanced TMOS E–FET is
designed to withstand high energy in the avalanche and commuta-
tion modes. This new energy efficient design also offers a
drain–to–source diode with a fast recovery time. Designed for low
D
voltage, high speed switching applications in power supplies,
converters and PWM motor controls, these devices are particularly
well suited for bridge circuits where diode speed and commutating
safe operating areas are critical and offer additional safety margin
against unexpected voltage transients.
• Avalanche Energy Capability Specified at Elevated Temperature
• Low Stored Gate Charge for Efficient Switching
G
CASE 418B–02, Style 2
D2PAK
S
• Internal Source–to–Drain Diode Designed to Replace External Zener Transient Suppressor Absorbs High Energy in the
Avalanche Mode
• Source–to–Drain Diode Recovery time Comparable to Discrete Fast Recovery Diode
* See App. Note AN1327 – Very Wide Input Voltage Range; Off–line Flyback Switching Power Supply
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Drain–Source Voltage
Drain–Gate Voltage (RGS = 1.0 MΩ)
Gate–Source Voltage — Continuous
Gate–Source Voltage — Non–Repetitive (tp ≤ 10 ms)
Drain Current — Continuous @ 25°C
Drain Current — Continuous @ 100°C
Drain Current — Single Pulse (tp ≤ 10 µs)
Total Power Dissipation @ TC = 25°C
Derate above 25°C
Total Power Dissipation @ TA = 25°C (1)
Operating and Storage Temperature Range
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 100 Vdc, VGS = 10 Vdc, PEAK IL = 4.5 Apk, L = 10 mH, RG = 25 Ω)
Thermal Resistance — Junction to Case
Thermal Resistance — Junction to Ambient
Thermal Resistance — Junction to Ambient (1)
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds
(1) When surface mounted to an FR4 board using the minimum recommended pad size.
E–FET and Designer’s are trademarks of Motorola, Inc.
TMOS is a registered trademark of Motorola, Inc.
Thermal Clad is a trademark of the Bergquist Company.
Preferred devices are Motorola recommended choices for future use and best overall value.
REV 1
Symbol
VDSS
VDGR
VGS
VGSM
ID
ID
IDM
PD
TJ, Tstg
EAS
RθJC
RθJA
RθJA
TL
Value
1200
1200
± 20
± 40
3.0
2.2
11
125
1.0
2.5
– 55 to 150
101
1.0
62.5
50
260
Unit
Vdc
Vdc
Vdc
Vpk
Adc
Apk
Watts
W/°C
Watts
°C
mJ
°C/W
°C
Motorola TMOS Power MOSFET Transistor Device Data
© Motorola, Inc. 1995
1
1 page 16 400
14 350
12
10 QT
300
250
8
6 Q1
Q2
VGS 200
150
4
ID = 3 A
100
TJ = 25°C
2 50
Q3
0
VDS
0
04
8 12 16 20 24 28 32
Qg, TOTAL GATE CHARGE (nC)
Figure 8. Gate–To–Source and Drain–To–Source
Voltage versus Total Charge
1000
VDD = 600 V
ID = 3 A
VGS = 10 V
TJ = 25°C
100
td(off)
tf
10 td(on)
tr
MTB3N120E
1
1 10 100
RG, GATE RESISTANCE (OHMS)
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
DRAIN–TO–SOURCE DIODE CHARACTERISTICS
3.0
VGS = 0 V
2.4 TJ = 25°C
1.8
1.2
0.6
0
0.55 0.59 0.63 0.67 0.71 0.75 0.79
VSD, SOURCE–TO–DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage versus Current
SAFE OPERATING AREA
The Forward Biased Safe Operating Area curves define
the maximum simultaneous drain–to–source voltage and
drain current that a transistor can handle safely when it is for-
ward biased. Curves are based upon maximum peak junc-
tion temperature and a case temperature (TC) of 25°C. Peak
repetitive pulsed power limits are determined by using the
thermal response data in conjunction with the procedures
discussed in AN569, “Transient Thermal Resistance–General
Data and Its Use.”
Switching between the off–state and the on–state may tra-
verse any load line provided neither rated peak current (IDM)
nor rated voltage (VDSS) is exceeded and the transition time
(tr,tf) do not exceed 10 µs. In addition the total power aver-
aged over a complete switching cycle must not exceed
(TJ(MAX) – TC)/(RθJC).
A Power MOSFET designated E–FET can be safely used
in switching circuits with unclamped inductive loads. For reli-
able operation, the stored energy from circuit inductance dis-
sipated in the transistor while in avalanche must be less than
the rated limit and adjusted for operating conditions differing
from those specified. Although industry practice is to rate in
terms of energy, avalanche energy capability is not a con-
stant. The energy rating decreases non–linearly with an in-
crease of peak current in avalanche and peak junction
temperature.
Although many E–FETs can withstand the stress of drain–
to–source avalanche at currents up to rated pulsed current
(IDM), the energy rating is specified at rated continuous cur-
rent (ID), in accordance with industry custom. The energy rat-
ing must be derated for temperature as shown in the
accompanying graph (Figure 12). Maximum energy at cur-
rents below rated continuous ID can safely be assumed to
equal the values indicated.
Motorola TMOS Power MOSFET Transistor Device Data
5
5 Page PACKAGE DIMENSIONS
MTB3N120E
C
E
BV
4
123
S
A
–T–
SEATING
PLANE
G
K
J
D 3 PL
0.13 (0.005) M T
H
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
CASE 418B–02
ISSUE B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
INCHES
DIM MIN MAX
A 0.340 0.380
B 0.380 0.405
C 0.160 0.190
D 0.020 0.035
E 0.045 0.055
G 0.100 BSC
H 0.080 0.110
J 0.018 0.025
K 0.090 0.110
S 0.575 0.625
V 0.045 0.055
MILLIMETERS
MIN MAX
8.64 9.65
9.65 10.29
4.06 4.83
0.51 0.89
1.14 1.40
2.54 BSC
2.03 2.79
0.46 0.64
2.29 2.79
14.60 15.88
1.14 1.40
Motorola TMOS Power MOSFET Transistor Device Data
11
11 Page |
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PDF Descargar | [ Datasheet MTB3N120E.PDF ] |
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