PDF MSM5116405C Data sheet ( Hoja de datos )

Número de pieza	MSM5116405C
Descripción	DRAM / FAST PAGE MODE TYPE
Fabricantes	OKI electronic componets
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No Preview Available ! E2G0107-18-42 ¡¡SemicondSucetormiconductor This versiMonS:MA5p1r1. 61490985C MSM5116405C 4,194,304-Word ¥ 4-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO DESCRIPTION The MSM5116405C is a 4,194,304-word ¥ 4-bit dynamic RAM fabricated in Oki's silicon-gate CMOS technology. The MSM5116405C achieves high integration, high-speed operation, and low-power consumption because Oki manufactures the device in a quadruple-layer polysilicon/double-layer metal CMOS process. The MSM5116405C is available in a 26/24-pin plastic SOJ or 26/24-pin plastic TSOP. FEATURES • 4,194,304-word ¥ 4-bit configuration • Single 5 V power supply, ±10% tolerance • Input : TTL compatible, low input capacitance • Output : TTL compatible, 3-state • Refresh : 4096 cycles/64 ms • Fast page mode with EDO, read modify write capability • CAS before RAS refresh, hidden refresh, RAS-only refresh capability • Multi-bit test mode capability • Package options: 26/24-pin 300 mil plastic SOJ (SOJ26/24-P-300-1.27) (Product : MSM5116405C-xxSJ) 26/24-pin 300 mil plastic TSOP (TSOPII26/24-P-300-1.27-K) (Product : MSM5116405C-xxTS-K) (TSOPII26/24-P-300-1.27-L) (Product : MSM5116405C-xxTS-L) xx indicates speed rank. PRODUCT FAMILY Family MSM5116405C-50 MSM5116405C-60 MSM5116405C-70 Access Time (Max.) Cycle Time Power Dissipation tRAC tAA tCAC tOEA (Min.) Operating (Max.) Standby (Max.) 50 ns 25 ns 13 ns 13 ns 90 ns 550 mW 60 ns 30 ns 15 ns 15 ns 110 ns 495 mW 5.5 mW 70 ns 35 ns 20 ns 20 ns 130 ns 440 mW 1/18 1 page ¡ Semiconductor MSM5116405C DC Characteristics (VCC = 5 V ±10%, Ta = 0°C to 70°C) Parameter Symbol Condition MSM5116405 MSM5116405 MSM5116405 C-50 C-60 C-70 Unit Note Min. Max. Min. Max. Min. Max. Output High Voltage Output Low Voltage Input Leakage Current VOH IOH = –5.0 mA VOL IOL = 4.2 mA 0 V £ VI £ 6.5 V; ILI All other pins not under test = 0 V 2.4 VCC 0 0.4 2.4 VCC 0 0.4 2.4 VCC 0 0.4 V V –10 10 –10 10 –10 10 mA DQ disable Output Leakage Current ILO 0 V £ VO £ VCC –10 10 –10 10 –10 10 mA Average Power Supply Current (Operating) RAS, CAS cycling, ICC1 tRC = Min. — 100 — 90 — 80 mA 1, 2 Power Supply Current (Standby) Average Power RAS, CAS = VIH ICC2 RAS, CAS ≥ VCC –0.2 V RAS cycling, —2 —1 —2 —1 —2 mA 1 —1 Supply Current (RAS-only Refresh) Power Supply Current (Standby) ICC3 CAS = VIH, tRC = Min. RAS = VIH, ICC5 CAS = VIL, DQ = enable — 100 — 90 — 80 mA 1, 2 —5 —5 — 5 mA 1 Average Power Supply Current (CAS before RAS Refresh) RAS cycling, ICC6 CAS before RAS — 100 — 90 — 80 mA 1, 2 Average Power Supply Current (Fast Page Mode) RAS = VIL, ICC7 CAS cycling, tHPC = Min. — 90 — 80 — 70 mA 1, 3 Notes : 1. ICC Max. is specified as ICC for output open condition. 2. The address can be changed once or less while RAS = VIL. 3. The address can be changed once or less while CAS = VIH. 5/18 5 Page ¡ Semiconductor MSM5116405C Fast Page Mode Read Cycle (Part-1) RAS VIH – VIL – ,,,,CAS VIH – VIL – tCRP tASR tRCD tCAS tRAD tRAH tCSH tASC tCAH tRASP tHPC tCP tCAS tASC tCAH tRHCP tCP tCAS tASC tCAH tRP Address VIH – VIL – Row Column Column Column tRCS tRRH WE VIH – VIL – OE VIH – VIL – DQ VOH – VOL – tRAC tAA tOEA tCAC tCLZ FastPageModeReadCycle(Part-2) tCHO tOCH tAA tCPA tDOH Valid Data-out tOEP tAA tOEP tOEA tOEA tCAC tOEZ tCAC tOEZ tREZ Valid Data-out Valid* Data-out Valid* Data-out * : Same Data, "H" or "L" tRASP tRP RAS VIH – VIL – tCRP tRCD tRHCP tHPC tCP tCP tCRP CAS VIH – VIL – tRAD tCAS tCAS tCAS Address VIH – VIL – WE VIH – VIL – ,,OE VIH – VIL – tCSH tASR tRAH tASC tCAH Row Column tRCS tRAC tAA tRCH tASC tCAH Column tRCS tWPE tAA tOEA tCAC tWEZ tCAC tASC tCAH Column tAA tCPA tCAC tDOH tCEZ DQ VOH – VOL – Valid tCLZ Data-out Valid Data-out Valid Data-out "H" or "L" 11/18 11 Page

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