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PDF MB40168 Data sheet ( Hoja de datos )
| Número de pieza | MB40168 | |
| Descripción | (MB40178) Single Chip 8-Bit A/D and 9-Bit D/A Converter | |
| Fabricantes | Fujitsu Media Devices Limited | |
| Logotipo |  |
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FUJITSU SEMICONDUCTOR
DATA SHEET
DS04-28501-2E
ASSP
Single Chip 8-Bit A/D and 9-Bit
D/A Converter
MB40168/MB40178
s DESCRIPTION
The Fujitsu MB40168 and MB40178 are high speed, low power single chip A/D and D/A converters designed
for video processing applications. The A/D converter has a resolution of 8 bits while the D/A converter has 9-
bit resolution. They are fabricated in Fujitsu’s advanced bipolar technology, and housed in a 48-pin plastic shrink
DIP or 44-pin plastic QFP package.
s FEATURES
• Resolution
A/D: 8 bits
• Conversion Rate
D/A: 9 bits
A/D: Max. 20 MSPS
D/A: Max. 40 MSPS
• Linearity Error
A/D: Max. + 0.3%
D/A: Max. + 0.2%
• On-chip reference voltage generator (resistor divided method) and clamp circuit
• Analog Input Voltage
3 to 5 V without clamp circuit
0 to 3 V in 1.95 VP-P clamp circuit
• Analog Output Voltage
3 to 5 V
s PACKAGES
(Continued)
48 pin, Plastic SH-DIP
44 pin, Plastic QFP
(DIP-48P-M01)
(FPT-44P-M11)
This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields. However, it is advised that
normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit.
1 page  
MB40168/MB40178
s BLOCKDIAGRAM
VINA
ADCLK
VRT
R1
R
VCCD
1
2
VCCA
R
VRM
R/2
R/2
127
128
255 to 8
Encoder
Latch
&
Buffer
R
254
R
255
R2
VRB
VINC
VOUTC
VCLMP
VREF
VRIN
DACLK
≈ 0.6VCCA + 50mV
0.6VCCA
Clamp
Reference
voltage
generator
Reference
resistor
Amp
DD9 (LSB)
DD1 (MSB)
9
Input
buffer
9
Master
Slave
register
9
9
Buffer
Current
switch
9
R-2R Ladder
resistor
network
DGND
AGND
DA1 (MSB)
DA2
DA3
DA4
DA5
DA6
DA7
DA8 (LSB)
COMP
AOUT
5
5 Page 
MB40168/MB40178
s OUTPUT VOLTAGE CHARACTERISTIC OF D/A CONVERTER BLOCK
Input
DD1 ~ DD9
511
(VCCA)
VOFS
Output
A.OUT
5.000V
5.000V
0 VOZS
(VRIN)
3.004V
3.000V
1 LSB = 4mV
s CALCULATION OF DAC OUTPUT VOLTAGE WHEN THE IDEAL CONVERSION IS PER-
FORMED
AOUTN = VCCA –
511-N
512
x (VCCA – VRIN)
(N: Digital code (0 ~ 511)
VOFS = VCCA
VOZS = VCCA –
511
512
x (VCCA – VRIN)
11
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet MB40168.PDF ] | |
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