PDF PM6541 Data sheet ( Hoja de datos )

Número de pieza	PM6541
Descripción	E1XC EVALUATION DAUGHTERBOARD
Fabricantes	PMC
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No Preview Available ! TELECOM STANDARD PRODUCT PMC-930917 ISSUE 1 PMC-Sierra, Inc. PM6541 E1XC-EVBD E1XC EVALUATION DAUGHTERBOARD PM6541 E1XC-EVBD E1XC EVALUATION DAUGHTERBOARD PMC-Sierra, Inc. ISSUE 1: DECEMBER 1997 105 - 8555 Baxter Place Burnaby, BC Canada V5A 4V7 604 .415.6000 1 page TELECOM STANDARD PRODUCT PMC-930917 ISSUE 1 2 FUNCTIONAL DESCRIPTION 2.1 Block Diagram DIP Sw. Osc Osc PMC-Sierra, Inc. PM6541 E1XC-EVBD E1XC EVALUATION DAUGHTERBOARD Clock/PLL Clock Hdr E1XC East Decode Logic Headers E1XC West Osc Figure 1: Block Diagram 2.2 Bus Transceivers Bus transceivers are provided at the connector interface to prevent excessive loading of the 68HC11 on the EVMB evaluation motherboard. In addition they provide some measure of isolation for the daughterboard and protection for other external signals such as the EXTCLK and EXTFP inputs. 2 5 Page TELECOM STANDARD PRODUCT PMC-930917 ISSUE 1 PMC-Sierra, Inc. PM6541 E1XC-EVBD E1XC EVALUATION DAUGHTERBOARD 3.2.1 External Signal Header This header is provided to accept an external clock and framing pulse source. These inputs are then buffered for use on the board. External clock sources must be buffered through this header to avoid possible damage to the E1XCs or DPLL. Signal EXTFP EXTCLK BEXTFP BEXTCLK Type I I O O Ref. J26-2 J26-4 J27-1 J27-2 Description External Framing Pulse Input External Clock Input Buffered External Framing Pulse Buffered External Clock 3.2.2 DPLL Header This header is provided to give access to the clock generating MT8940 DPLL chip as well as provide direct oscillator access. All of the major DPLL outputs are brought out to this header even though they may be of limited use with the E1XC (e.g. the 4.096 MHz clock). Signal FPIN C8KB GFP C1M5 C1M5B C2M C2MB C4M C4MB Type Ref. I J29-2 I/O J29-1 I/O J29-3 O J29-4 O J29-5 O J29-6 O J29-7 O J29-8 O J29-9 Description 1.544 MHz Framing pulse input to MT8940. 2.048 MHz Framing pulse in/out (mode dependent). 8 kHz Framing pulse output from the MT8940. Note that this active low output signal is derived from the 16.388 MHz clock and has a 244ns pulse width. 1.544 MHz Output clock from MT8940. Inverted C1M5 clock. 2.048 MHz output clock from MT8940. Inverted C2M clock. 4.096 MHz Output clock from MT8940. Inverted C4M clock. 8 11 Page

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PM6541	E1XC EVALUATION DAUGHTERBOARD	PMC

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