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PDF MN6732741 Data sheet ( Hoja de datos )
| Número de pieza | MN6732741 | |
| Descripción | Signal-processing IC for surveillance cameras and cameras for PC input | |
| Fabricantes | Panasonic | |
| Logotipo |  |
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Video Camera LSIs
MN6732741
Signal-processing IC for surveillance cameras and cameras for PC input
I Overview
The MN6732741 is camera signal-processing IC appropriate for a wide variety of applications, including
surveillance cameras and cameras used for input to personal computers. In addition to the basic functions of luminance
and chrominance signal processing, it also integrates the ALC, AWB, and AGC functions that were previously
implemented using microcontroller signal processing. Furthermore, it also integrates on a single chip, including SSG,
CG, and I2C-bus functions.
I Features
• Input:
Analog signal (A/D converter input)
• Outputs:
Digital output
8-bit YUV signal
Analog outputs
Luminance signal
Chrominance signal
Composite video signal output
RGB output
• Operating supply voltage: 3.3 V ± 0.3 V
• Operating clock frequency: 9.5 MHz to 28.7 MHz
• Main functions
• 10-bit A/D converter
• Single-channel 10-bit D/A converter
• Two-channel 8-bit D/A converter
• Supports analog AGC (NN2038 or NN2039)
• CG and SSG circuits
• Supports 510 and 768 horizontal lines (NTSC and PAL)
• Supports VGA progressive scan readout CCDs (complementary color filters)
• Also supports black-and-white CCD signal processing
• CCD white defect/black defect correction circuit
• Digital AGC gain: up to 24 dB
• Left/right reversing function
• Variable gamma correction (γ = 0.3 to 1)
• ZV port standard mode, BT656 standard mode
• Modes: LL, SYNC, VD2, and HD/VD external synchronization support
• Built-in I2C-bus circuit
• ALC and AGC (Also supports external AGC)
• Two white balance modes (manual and ATW) with ATW lock function
• Automatic OB correction function
I Applications
• Surveillance cameras, PC input cameras, multimedia cameras
Publication date: August 2001
SDB00060AEM
1
1 page  
MN6732741
I Pin Descriptions
Pin No.
Pin
1 N.C.
2 V4
3 V3
4 VSS5
5 VDD5
6 V2
7 N.C.
8 V1
9 N.C.
10 SUB
11 N.C.
12 CH2
13 N.C.
14 CH1
15 OSCCNT
16 CXIN
17 CXOUT
18 OSCVDD
19 OSCVSS
20 TESTDC1
21 WHD
22 FVD
23 FWHD
24 CPOB
25 PBLK
26 HCLR
27 LLDET
28 FLC
29 VDD1
30 VSS1
31 EXTIN0
32 EXTIN1
33 EXTMOD
34 PCO
35 NTPL
I/O
O
O
VSS
VDD
O
O
O
O
O
O
I
O
VDD
VSS
I
O
O
O
O
O
O
I
I
VDD
VSS
I
I
I
O
I
Description
φV4 charge pulse
φV3 charge pulse
Digital system ground
Digital system power supply (3.3 V)
φV2 charge pulse
φV1 charge pulse
Vertical removal pulse
V3 charge pulse
V1 charge pulse
Oscillator control test
Synchronization oscillator (crystal oscillator)
Synchronization oscillator (crystal oscillator)
Oscillator cell power supply
Oscillator cell ground
Test input (Normally connect to low.)
WHD signal that is in proper phase relative to the sync signal
VD signal that is in proper phase relative to the sync signal
WHD for TG drive
A/D converter input signal clamp pulse, or D/A converter output clamp pulse
Pre-blanking pulse
Horizontal reference signal
Power supply synchronization switching signal
Low: internal synchronization, High: LL synchronization
Flicker correction (pulled up). High: Flicker correction on
Digital system power supply (3.3 V)
Digital system ground
External sync signal input 1
External sync signal input 2
Monitor/automotive mode switch (pulled up)
High: Automotive mode (HDVD/SYNC synchronization mode)
Phase comparator output
NTSC/PAL switching. Low: NTSC, High: PAL (pulled down)
SDB00060AEM
5
5 Page 
MN6732741
I Electrical Characteristics (continued)
5. A/D converter at VDD = TGVDD = OSCVDD = 3.3 V, ADVDD = DAVDD = 3.3 V,
VSS = TGVSS = OSCVSS = ADVSS = DAVSS = 0 V, Ta = 25°C
Pins: VIN, VREFH, VREFL, VREFM, VREFML, VREFHM
Parameter
Symbol
Condition
Min Typ
1) A/D converter recommended operating conditions
Analog input voltage
VAIN
Analog input pin capacitance
CAI
High-level reference voltage
VREFH
Low-level reference voltage
VREFL
Referenceresistance(VREFLtoVREFH) RREF
2) A/D converter characteristics
VIN
VIN
VREFH
VREFL
VREFL
330
2.5
0.5
440
Resolution
Nonlinearity error
Differential nonlinearity error
Analog input dynamic range
RES
INL
DNL
VAIN
fADCK = 14.3 MHz
VREFH = 2.5 V
VREFL = 0.5 V
±5.0
±2.0
Max Unit
VREFH
V
pF
V
V
Ω
10 bit
±7.5 LSB
±6.5 LSB
VREFH − V[p-p]
VREFL
6. D/A converter at VDD = TGVDD = OSCVDD = 3.3 V, ADVDD = DAVDD = 3.3 V,
VSS = TGVSS = OSCVSS = ADVSS = DAVSS = 0 V, Ta = 25°C
1) Pins: VREF23, IREF23, COMP23, BSIG, RSIG
Parameter
Symbol
Condition
Min Typ
(1) D/A converter recommended operating conditions
Reference voltage
VREF RL = 75 Ω
RIREF23 = 820 Ω
1.37
External phase compensation
capacitor
External output resistors
CCOMP
RL
External bias current setting
resistor
RIREF
(2) D/A converter characteristics
Connected between COMP23
and AVDD.
Connect output resistors
between each of the BSIG
and RSIG pins and AVSS.
Connect this resistor between
IREF23 and AVSS.
1.0
75
820
Resolution
Nonlinearity error
Differential nonlinearity error
RES
INL
DNL
RL = 75 Ω
VREF23 = 1.37 V
RIREF23 = 820 Ω
Full-scale voltage
Zero-scale voltage
VOFS
VOZS
1.0
0
Max Unit
V
µF
Ω
Ω
8 bit
±2.5 LSB
±2.5 LSB
V
V
SDB00060AEM
11
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet MN6732741.PDF ] | |
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