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PDF MC74HCT240A Data sheet ( Hoja de datos )
| Número de pieza | MC74HCT240A | |
| Descripción | Octal 3-State Inverting Buffer/Line Driver/Line Receiver with LSTTL-Compatible Inputs | |
| Fabricantes | Motorola Semiconductors | |
| Logotipo |  |
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Octal 3-State Inverting Buffer/
Line Driver/Line Receiver with
LSTTL-Compatible Inputs
High–Performance Silicon–Gate CMOS
The MC74HCT240A is identical in pinout to the LS240. This device may
be used as a level converter for interfacing TTL or NMOS outputs to
High–Speed CMOS inputs. The HCT240A is an octal inverting buffer line
driver line receiver designed to be used with 3–state memory address
drivers, clock drivers, and other bus–oriented systems. The device has
inverting outputs and two active–low output enables.
The HCT240A is the inverting version of the HCT244. See also HCT241.
• Output Drive Capability: 15 LSTTL Loads
• TTL NMOS–Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1 µA
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 110 FETs or 27.5 Equivalent Gates
A1 2
A2 4
A3 6
DATA INPUTS
A4 8
B1 11
B2 13
B3 15
B4 17
LOGIC DIAGRAM
18 YA1
16 YA2
14 YA3
12 YA4
9 YB1
7 YB2
5 YB3
3 YB4
INVERTING
OUTPUTS
OUTPUT ENABLE A 1
ENABLES ENABLE B 19
PIN 20 = VCC
PIN 10 = GND
MC74HCT240A
20
1
20
1
N SUFFIX
PLASTIC PACKAGE
CASE 738–03
DW SUFFIX
SOIC PACKAGE
CASE 751D–04
20
1
SD SUFFIX
SSOP PACKAGE
CASE 940C–03
20
1
DT SUFFIX
TSSOP PACKAGE
CASE 948E–02
ORDERING INFORMATION
MC74HCTXXXAN
MC74HCTXXXADW
MC74HCTXXXASD
MC74HCTXXXADT
Plastic
SOIC
SSOP
TSSOP
PIN ASSIGNMENT
ENABLE A 1
A1 2
YB4 3
A2 4
YB3 5
A3 6
YB2 7
A4 8
YB1 9
GND 10
20 VCC
19 ENABLE B
18 YA1
17 B4
16 YA2
15 B3
14 YA3
13 B2
12 YA4
11 B1
FUNCTION TABLE
Inputs
Enable A,
Enable B A, B
Outputs
YA, YB
L LH
LHL
HXZ
Z = High Impedance
X = Don’t Care
2/97
© Motorola, Inc. 1997
1
REV 7
1 page  
–A–
20
1
–T–
SEATING
PLANE
E
GF
MC74HCT240A
OUTLINE DIMENSIONS
N SUFFIX
PLASTIC PACKAGE
CASE 738–03
ISSUE E
11
B
10
C
L
K
N
D 20 PL
0.25 (0.010) M T A M
M
J 20 PL
0.25 (0.010) M
TBM
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
INCHES
MILLIMETERS
DIM MIN MAX MIN MAX
A 1.010 1.070 25.66 27.17
B 0.240 0.260 6.10 6.60
C 0.150 0.180 3.81 4.57
D 0.015 0.022 0.39 0.55
E 0.050 BSC
1.27 BSC
F 0.050 0.070 1.27 1.77
G 0.100 BSC
2.54 BSC
J 0.008 0.015 0.21 0.38
K 0.110 0.140 2.80 3.55
L 0.300 BSC
7.62 BSC
M 0_ 15_ 0_ 15_
N 0.020 0.040 0.51 1.01
DW SUFFIX
PLASTIC SOIC PACKAGE
CASE 751D–04
–A–
20 11
ISSUE E
–B– 10X P
0.010 (0.25) M B M
1 10
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.150
(0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.13
(0.005) TOTAL IN EXCESS OF D DIMENSION
AT MAXIMUM MATERIAL CONDITION.
20X D
0.010 (0.25) M T A S B S
J
F
18X G
C
–T–
SEATING
PLANE
K
M
R X 45_
MILLIMETERS
INCHES
DIM MIN MAX MIN MAX
A 12.65 12.95 0.499 0.510
B 7.40 7.60 0.292 0.299
C 2.35 2.65 0.093 0.104
D 0.35 0.49 0.014 0.019
F 0.50 0.90 0.020 0.035
G 1.27 BSC
0.050 BSC
J 0.25 0.32 0.010 0.012
K 0.10 0.25 0.004 0.009
M 0_ 7_ 0_ 7_
P 10.05 10.55 0.395 0.415
R 0.25 0.75 0.010 0.029
High–Speed CMOS Logic Data
DL129 — Rev 6
5
MOTOROLA
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| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet MC74HCT240A.PDF ] | |
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