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PDF STK11C68 Data sheet ( Hoja de datos )

Número de pieza STK11C68
Descripción 8K x 8 nvSRAM QuantumTrap CMOS Nonvolatile Static RAM
Fabricantes Simtek 
Logotipo Simtek Logotipo



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No Preview Available ! STK11C68 Hoja de datos, Descripción, Manual

STK11C68
8K x 8 nvSRAM
QuantumTrap™ CMOS
Nonvolatile Static RAM
FEATURES
• 20ns, 25ns, 35ns and 45ns Access Times
STORE to EEPROM Initiated by Software
RECALL to SRAM Initiated by Software or
Power Restore
• 10mA Typical ICC at 200ns Cycle Time
• Unlimited READ, WRITE and RECALL Cycles
• 1,000,000 STORE Cycles to EEPROM
• 100-Year Data Retention over Full Industrial
Temperature Range
• Commercial and Industrial Temperatures
• 28-Pin DIP and SOIC Packages
DESCRIPTION
The Simtek STK11C68 is a fast static RAM with a
nonvolatile, electrically erasable PROM element
incorporated in each static memory cell. The SRAM
can be read and written an unlimited number of
times, while independent nonvolatile data resides in
the EEPROM. Data transfers from the SRAM to the
EEPROM (the STORE operation), or from EEPROM to
SRAM (the RECALL operation), take place using a
software sequence. Transfers from the EEPROM to
the SRAM (the RECALL operation) also take place
automatically on restoration of power.
The STK11C68 is pin-compatible with industry-
standard SRAMs. MIL-STD-883 device is also
available (STK11C68-M).
BLOCK DIAGRAM
EEPROM ARRAY
128 x 512
A5
A6 STORE
A7 STATIC RAM
A8
ARRAY
RECALL
A9 128 x 512
A11
A12
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
COLUMN I/O
COLUMN DEC
A0 A1 A2 A3 A4 A10
STORE/
RECALL
CONTROL
SOFTWARE
DETECT
G
E
W
A0 - A12
PIN CONFIGURATIONS
NC
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 VCC
27 W
26 NC
25 A8
24 A9
23 A11
22 G
21 A10
20 E
19 DQ7
18 DQ6
17 DQ5
16 DQ4
15 DQ3
28 - 300 PDIP
28 - 300 CDIP
28 - 350 SOIC
PIN NAMES
A0 - A12
W
DQ0 - DQ7
E
G
VCC
VSS
Address Inputs
Write Enable
Data In/Out
Chip Enable
Output Enable
Power (+ 5V)
Ground
June 1999
4-21

1 page




STK11C68 pdf
STORE INHIBIT/POWER-UP RECALL
SYMBOLS
NO.
Standard
PARAMETER
22 tRESTORE
23 tSTORE
24 VSWITCH
25 VRESET
Power-up RECALL Duration
STORE Cycle Duration
Low Voltage Trigger Level
Low Voltage Reset Level
Note l: tRESTORE starts from the time VCC rises above VSWITCH.
STORE INHIBIT/POWER-UP RECALL
VCC
5V
24
VSWITCH
25
VRESET
STORE INHIBIT
OWER-UP RECALL
DQ (DATA OUT)
22
tRESTORE
STK11C68
(VCC = 5.0V + 10%)b
STK11C68
MIN MAX
550
10
UNITS NOTES
µs l
ms
4.0 4.5
V
3.9 V
POWER-UP
RECALL
BROWN OUT
STORE INHIBIT
NO RECALL
(VCC DID NOT GO
BELOW VRESET)
BROWN OUT
STORE INHIBIT
NO RECALL
(VCC DID NOT GO
BELOW VRESET)
BROWN OUT
STORE INHIBIT
RECALL WHEN
VCC RETURNS
ABOVE VSWITCH
June 1999
4-25

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