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PDF MC14528B Data sheet ( Hoja de datos )

Número de pieza MC14528B
Descripción Dual Monostable Multivibrator
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MC14528B
Dual Monostable
Multivibrator
The MC14528B is a dual, retriggerable, resettable monostable
multivibrator. It may be triggered from either edge of an input pulse,
and produces an output pulse over a wide range of widths, the duration
of which is determined by the external timing components,
CX and RX.
Features
Separate Reset Available
Diode Protection on All Inputs
Triggerable from Leading or Trailing Edge Pulse
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low−power TTL Loads or One Low−power
Schottky TTL Load Over the Rated Temperature Range
This part should only be used in new designs where the pulse width
is < 10 ms
Note: For designs requiring a pulse width > 10 ms, please see
MC14538, which is pin−for−pin compatible
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
This Device is Pb−Free and is RoHS Compliant
MAXIMUM RATINGS (Voltages Referenced to VSS)
Rating
Symbol
Value
Unit
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
VDD
Vin, Vout
−0.5 to +18.0
−0.5 to VDD + 0.5
V
V
Input or Output Current
(DC or Transient) per Pin
Iin, Iout
± 10 mA
Power Dissipation, per Package
(Note 1)
PD
500 mW
Ambient Temperature Range
TA
−55 to +125
°C
Storage Temperature Range
Lead Temperature
(8−Second Soldering)
Tstg
−65 to +150
°C
TL 260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Temperature Derating: “D/DW” Package: –7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS (Vin or Vout) VDD.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either VSS or VDD). Unused outputs must be left open.
http://onsemi.com
1
SOIC−16
D SUFFIX
CASE 751B
PIN ASSIGNMENT
VSS
CX1/RX1
RESET 1
A1
B1
Q1
Q1
VSS
1
2
3
4
5
6
7
8
16 VDD
15 VSS
14 CX2/RX2
13 RESET 2
12 A2
11 B2
10 Q2
9 Q2
MARKING DIAGRAM
14528BG
AWLYWW
1
A = Assembly Location
WL = Wafer Lot
YY, Y = Year
WW, W = Work Week
G = Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
July, 2014 − Rev. 9
1
Publication Order Number:
MC14528B/D

1 page




MC14528B pdf
MC14528B
ORDERING INFORMATION
Device
Package
Shipping
MC14528BDG
SOIC−16
(Pb−Free)
48 Units / Rail
MC14528BDR2G
SOIC−16
(Pb−Free)
2500 / Tape & Reel
NLV14528BDR2G*
SOIC−16
(Pb−Free)
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.
VDD
16
A Q OPEN
B
RESET
VOH
Q
8 VSS
IOH
VDD
16
IOL
AQ
VOL
B
RESET Q
OPEN
8 VSS
Figure 1. Output Source Current Test Circuit
Figure 2. Output Sink Current Test Circuit
500 pF
VDD
ID
0.1 mF
CERAMIC
RX
CX
RX
CX
Vin
A
B
RESET
A
B
RESET
Q
CL
Q
CL
Q
CL
Q
CL
VSS
20 ns
Vin
90%
10%
DUTY CYCLE = 50%
20 ns
VDD
0V
Figure 3. Power Dissipation Test Circuit and Waveforms
http://onsemi.com
5

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