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Número de pieza | STK20C04 | |
Descripción | CMOS nvSRAM High Performance 512 x 8 Nonvolatile Static RAM | |
Fabricantes | ETC | |
Logotipo | ||
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No Preview Available ! STK20C04
STK20C04
CMOS nvSRAM
High Performance
512 x 8 Nonvolatile Static RAM
FEATURES
• 30, 35 and 45ns Access Times
• 15, 20 and 25ns Output Enable Access
• Unlimited Read and Write to SRAM
• Hardware STORE Initiation
• Automatic STORE Timing
• 105 STORE cycles to EEPROM
• 10 year data retention in EEPROM
• Automatic RECALL on Power Up
• Hardware RECALL Initiation
• Unlimited RECALL cycles from EEPROM
• Single 5V±10% Operation
• Commercial and Industrial Temperatures
• Available in 600 mil PDIP package
DESCRIPTION
The Simtek STK20C04 is a fast static RAM (30, 35,
45ns), with a nonvolatile electrically-erasable PROM
(EEPROM) element incorporated in each static memory
cell. The SRAM can be read and written an unlimited
number of times, while independent nonvolatile data
resides in EEPROM. Data may easily be transferred
from the SRAM to the EEPROM (STORE), or from the
EEPROM to the SRAM (RECALL) using the NE pin. It
combines the high performance and ease of use of a
fast SRAM with nonvolatile data integrity.
The STK20C04 features the industry standard pinout
for nonvolatile RAMs in a 28-pin 600 mil plastic DIP.
LOGIC BLOCK DIAGRAM
EEPROM ARRAY
64 X 64
STORE
A3
A4
STATIC RAM
RECALL
A5 ARRAY
A6 64 X 64
A7
A8
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
COLUMN I/O
COLUMN DECODER
A0 A1
A2
PIN CONFIGURATIONS
NE
NC
A7
A6
A5
A4
A3
A2
A1
A0
DQ 0
DQ 1
DO 2
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28 VCC
27 W
26 NC
25 A 8
24 NC
23 NC
22 G
21 NC
20 E
19 DQ 7
18 DQ 6
17 DQ 5
16 DQ 4
15 DQ 3
28 - 600 PDIP
STORE/
RECALL
CONTROL
G
NE
E
W
PIN NAMES
A0 - A8
W
Address Inputs
Write Enable
DQ0 - DQ7
E
Data In/Out
Chip Enable
G Output Enable
NE Nonvolatile Enable
VCC Power (+5V)
VSS Ground
2-39
1 page NONVOLATILE MEMORY OPERATION
STK20C04
MODE SELECTION
EW
HX
LH
LL
LH
LL
LL
LH
G
X
L
X
L
H
L
H
NE
X
H
H
L
L
L
X
MODE
Not Selected
Read RAM
Write RAM
Nonvolatile RECALLn
Nonvolatile STORE
No operation
POWER
Standby
Active
Active
Active
ICC2
Active
STORE CYCLES #1 & #2
SYMBOLS
NO.
#1
#2 Alt.
PARAMETER
(VCC = 5.0V ± 10%)
MIN MAX UNITS
22 tWLQXp
23 tWLNHq
24 tGHNL
25
26 tNLWL
27 tELWL
tELQXS
tELNHS
tGHEL
tNLEL
tSTORE
tWC
STORE Cycle Time
STORE Initiation Cycle Time
Output Disable Set-up to NE Fall
Output Disable Set-up to E Fall
NE Set-up
Chip Enable Set-up
10 ms
45 ns
0 ns
0 ns
0 ns
0 ns
28 tWLEL
Write Enable Set-up
0 ns
Note: n: An automatic RECALL also takes place at power up, starting when VCC exceeds 3.8V, and taking tRECALL from the time at which VCC exceeds 4.5V.
VCC must not drop below 3.8V once it has exceeded it for the RECALL to function properly.
Note o: If E is low for any period of time in which W is high while G and NE are low, then a RECALL cycle may be initiated.
Note p: Measured with W and NE both returned high, and G returned low. Note that STORE cycles are inhibited/aborted by VCC < 3.8V (STORE inhibit).
Note q: Once tWC has been satisfied by NE, G, W and E, the STORE cycle is completed automatically. Any of NE, G, W or E may be used to terminate the
STORE initiation cycle.
STORE CYCLE #1: W CONTROLLEDo
NE
G 24 26
tGHNL
tNLWL
W
27
E tELWL
DQ (Data Out)
HIGH IMPEDANCE
STORE CYCLE #2: E CONTROLLEDo
26
tNLEL
NE
25
tGHEL
G
28
W tWLEL
E
DQ (Data Out)
HIGH IMPEDANCE
2-43
23
tWLNH
22
tWLQX
23
tELNHS
22
tELQXS
5 Page |
Páginas | Total 8 Páginas | |
PDF Descargar | [ Datasheet STK20C04.PDF ] |
Número de pieza | Descripción | Fabricantes |
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