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PDF ST75951 Data sheet ( Hoja de datos )

Número de pieza ST75951
Descripción V.34/56K ANALOG FRONT END
Fabricantes ST Microelectronics 
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No Preview Available ! ST75951 Hoja de datos, Descripción, Manual

ST75951
V.34/56K ANALOG FRONT END
. V.34/56K MODEM ANALOG FRONT-END (AFE)
. 16 BITS OVERSAMPLING SIGMA DELTA A/D
AND D/A CONVERTERS
. 85dB DYNAMIC RANGE
. PROGRAMMABLE SAMPLING FREQUENCY
. AUXILIARY ANALOG INPUT
. MODEM SIDE OF SILICON DATA ACCESS AR-
RANGEMENT (DAA) INTEGRATED WITH AFE
. KRYPTON ISOLATION INC. PATENTED
TECHNOLOGY ELIMINATE TRANSFORMER
OR LINEAR OPTO-COUPLERS
. RING DETECT, LINE IN USE, CLID AND
OVER LOOP CURRENT DETECT
. 4 GPIO ASSOCIATED WITH 1 GENERAL
PURPOSE INTERRUPT OUTPUT
. ANALOG AND DIGITAL LOOP-BACK MODE
. SYNCHRONOUS SERIAL INTERFACE FOR
PROCESSORS DATA EXCHANGE
. ON CHIP REFERENCE VOLTAGE
. SINGLE POWER SUPPLY RANGE :
2.7V TO 5.25V
. LOW POWER CONSUMPTION : 40mW @ 3.3V
. TQFP48 PACKAGE
. 0.5µM CMOS PROCESS
DESCRIPTION
ST75951 is an analog front-end designed to im-
plement modems application up to 56Kbps.
ST75951 interfaces between DSP or HSP signals
and capacitive isolation barrier.
A complete D.A.A. is made with ST952 which inter-
faces between capacitive isolation barrier and the
telephone line.
TQFP48 (7 x 7 x 1.4mm)
(Full Plastic Quad Flat Pack)
ORDER CODE : ST75951
Figure 1
Digital
ST75951
Digital
ST952
Tip
Ring
It integrates a high resolution A/D and D/A
converter and incorporates Krypton Isolation
Inc. patented silicon D.A.A. technology.
February 1999
1/21

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ST75951 pdf
ST75951
PIN DESCRIPTION (continued)
4.2 - General Purpose Interrupt System (GPI)
The GPI will reflect any change of the GPIO’S
inputs or RING output when non-masked, so the
processor does not need to read the output control
word continuously. GPI level change tells the proc-
essor, one of the non-masked input pins level has
changed and he can read the control word. So
GPIO could extend the number of interrupt pins of
the processor.
5 - Ring
This pin is used for the Ring detect but also reports
the Line status, current limit.
6 - Digital Test Pin (TSTD1)
This pin is reserved for digital test purpose.
7 - Crystal (XTALIN , XTALOUT)
These pins must be tied to an external crystal or a
master clock generator (MCLK).
8 - Analog Interface (12 Pins)
8.1 - DAC and ADC Reference Voltage Output
(VREFP, VREFN )
These pins provide the positive and negative
reference Voltage used by the 16-bit converters.
The reference voltage, VREF, is the voltage difference
between the VREFP and VREFN outputs.
VREFP and VREFN should be externally decoupled
with respect to VCM.
8.2 - Common Mode Voltage Output (VCM)
This output pin is the common mode voltage
(AVDD - AGND)/2 . This output must be decoupled
with respect to GND.
8.3 - Common Mode Voltage Input (VCMP, VCMS)
These input pins are the common mode voltage for
internal circuitry. They have to be connected exter-
nally to VCM.
8.4 - Analog Transmit Output (D1 ,D2)
These pins are the output of the fully differential
converted analog signal, modulated at F0
(1MHz < F0 < 1.7MHz).
The digital data IN signal is converted in analog
signals (with (Sin X)/X compensation). Two ranges
of signal amplitude have to be considered ; modem
application with dynamic up to 2.5VPP with maxi-
mum performances SNDR = 83dB, voice applica-
tion with dynamic up to 3.2VPP differential
(SNDR = 75dB).
The transmit output stage can be programmed to
+2dB gain, 0db gain, 6dB or infinite attenuation.
8.5 - Analog Receive Inputs (D3, D4)
These pins are the differential analog inputs. These
analog inputs are presented to the F0 demodulator
and the sigma-delta modulator. The analog input
peak-to-peak differential signal range must be less
than 2.5 VPP. The gain of the receive stage is
programmable to 0dB or 6dB.
8.6. - Analog Test Pin (TSTA1, TSTA2)
These pins are reserved for analog test purpose.
8.7 Analog Auxiliary Receive Inputs (AUXIN)
This pin is the auxiliary analog input. This analog
input is presented to the analog modulator. The
analog input peak-to-peak signal range must be
less than 1.25 VPP. The gain of the receive stage
is 0dB.
5/21

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ST75951 arduino
ST75951
FUNCTIONAL DESCRIPTION (continued)
Figure 15
D3
VCM
1MHz
VCM
D4 1MHz
RING
BIT &
OUTPUT
D5
D6
D5 = D6 = VDD.
7.3 - Caller ID
Depending on Pin HM status (see Table 2), 2 pos-
sibilities are offered to control the device to go in
caller ID state.
F0 clock is send to D5, in caller ID mode the
modulation frequency of ST952 is equal to F0/2, so
the demodulation on the receive signal at D3, D4
is at F0/2 in caller ID mode.
Figure 16
D5
VDD
F0
D6
D6 = VDD.
Figure 17
FO Output at D5
FO/2 Demod
Control Signal
Caller ID Mode Phase Relative Hip
8 - Phone Line Monitoring Features
This chipset is intended to be used for a wide range
of application such as modem, answering machine,
telephony on PC, so because the home PSTN
phone line will be shared by several terminals,
information concerning the line status has to be
sent to the host.
As long as there is an alerting signal at D3, D4 Pins,
the ADC converter is saturated and outputs 7FFF
or 8000 at DOUT Pin.
8.1 - Line In Use Checking
Before going OFF-HOOK the modem software can
check that the line is free by setting the CLID mode
and check that the RING Pin/bit output a low pulse.
When in CLID mode if the line is free the ST952 will
output a F0/2, 5VPP differential signal on D3, D4
(see Figure 18).
8.2 - Digital Phone Line or Over Loop Current
Limit Detect
When portable modem plug into digital line, it will cause
over loop current during modem off-hook state.
The modem controller should know this condition
and go onhook to avoid the DAA being damaged.
ST952 when OFF-HOOK will determine if the loop
current exceeds the current limit or not (160mA).
If we have overcurrent ST952 will continuously
output a low level on RING output Pin.
11/21

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