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PDF MAX3280 Data sheet ( Hoja de datos )

Número de pieza MAX3280
Descripción 15kV ESD-Protected 52Mbps / 3V to 5.5V / SOT23 RS-485/RS-422 True Fail-Safe Receivers
Fabricantes Maxim Integrated 
Logotipo Maxim Integrated Logotipo



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No Preview Available ! MAX3280 Hoja de datos, Descripción, Manual

19-2320; Rev 0; 1/02
±15kV ESD-Protected 52Mbps, 3V to 5.5V, SOT23
RS-485/RS-422 True Fail-Safe Receivers
General Description
The MAX3280E/MAX3281E/MAX3283E/MAX3284E are
single receivers designed for RS-485 and RS-422 com-
munication. These devices guarantee data rates up to
52Mbps, even with a 3V power supply. Excellent propa-
gation delay (15ns max) and package-to-package
skew time (8ns max) make these devices ideal for mul-
tidrop clock distribution applications.
The MAX3280E/MAX3281E/MAX3283E/MAX3284E
have true fail-safe circuitry, which guarantees a logic-
high receiver output when the receiver inputs are
opened or shorted. The receiver output will be a logic
high if all transmitters on a terminated bus are disabled
(high impedance). These devices feature 1/4-unit-load
receiver input impedance, allowing up to 128 receivers
on the same bus.
The MAX3280E is a single receiver available in a 5-pin
SOT23 package. The MAX3281E/MAX3283E single
receivers have a receiver enable (EN or EN) function
and are offered in a 6-pin SOT23 package. The
MAX3284E features a voltage logic pin that allows com-
patibility with low-voltage logic levels, as in digital
FPGAs/ASICs. On the MAX3284E, the voltage threshold
for a logic high is user-defined by setting VL in the
range from 1.65V to VCC. The MAX3284E is also
offered in a 6-pin SOT23 package.
Features
o ESD Protection:
±15kV–Human Body Model
±6kV–IEC 1000-4-2, Contact Discharge
±12kV–IEC 1000-4-2, Air-Gap Discharge
o Guaranteed 52Mbps Data Rate
o Guaranteed 15ns Receiver Propagation Delay
o Guaranteed 2ns Receiver Skew
o Guaranteed 8ns Package-to-Package Skew Time
o VL Pin for Connection to FPGAs/ASICs
o Allow Up to 128 Transceivers on the Bus
(1/4-unit-load)
o Tiny SOT23 Package
o True Fail-Safe Receiver
o -7V to +12V Common-Mode Range
o 3V to 5.5V Power-Supply Range
o Enable (High and Low) Pins for Redundant
Operation
o Three-State Output Stage (MAX3281E/MAX3283E)
o Thermal Protection Against Output Short Circuit
Clock Distribution
Telecom Racks
Base Stations
Industrial Control
Local Area Networks
Applications
Pin Configurations appear at end of data sheet.
Ordering Information
PART
MAX3280EAUK-T
MAX3281EAUT-T
MAX3283EAUT-T
MAX3284EAUT-T
TEMP RANGE
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
PIN-
PACKAGE
5 SOT23-5
6 SOT23-6
6 SOT23-6
6 SOT23-6
TOP
MARK
ADVM
ABAT
ABAU
ABAV
Selector Guide
PART
VL
MAX3280E
MAX3281E
MAX3283E
MAX3284E
Note 1: MAX3284E data rate is dependent on VL.
ENABLE
Active High
Active Low
DATA RATE
52Mbps
52Mbps
52Mbps
52Mbps (Note 1)
PACKAGE
5-Pin SOT23
6-Pin SOT23
6-Pin SOT23
6-Pin SOT23
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

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MAX3280 pdf
±15kV ESD-Protected 52Mbps, 3V to 5.5V, SOT23
RS-485/RS-422 True Fail-Safe Receivers
Pin Description
PIN
MAX3280E MAX3281E MAX3283E MAX3284E
1111
2222
3333
4444
—— 5
5 ——
———
566
5
6
NAME
VCC
GND
RO
B
EN
EN
VL
A
FUNCTION
Positive Supply: 3V VCC 5.5V. Bypass with a 0.1µF
capacitor to GND.
Ground
Receiver Output. RO will be high if (AB) -50mV. RO will be
low if (AB) -200mV.
Inverting Receiver Input
Receiver Output Enable. Drive EN low to enable RO. When EN
is high, RO is high impedance.
Receiver Output Enable. Drive EN high to enable RO. When
EN is low, RO is high impedance.
Low-Voltage Logic-Level Supply Voltage. VL is a user-defined
voltage, ranging from 1.65V to VCC. RO output high is pulled up
to VL. Bypass with a 0.1µF capacitor to GND.
Noninverting Receiver Input
Detailed Description
The MAX3280E/MAX3281E/MAX3283E/MAX3284E are
single, true fail-safe receivers designed to operate at
data rates up to 52Mbps. The fail-safe architecture guar-
antees a high output signal if both input terminals are
open or shorted together. See the True Fail-Safe section.
This feature assures a stable and predictable output
logic state with any transmitter driving the line. These
receivers function with a 3.3V or 5V supply voltage and
feature excellent propagation delay times (15ns).
The MAX3280E is a single receiver available in a 5-pin
SOT23 package. The MAX3281E (EN, active high) and
MAX3283E (EN, active low) are single receivers that
also contain an enable pin. Both the MAX3281E and
MAX3283E are available in a 6-pin SOT23 package.
The MAX3284E is a single receiver that contains a VL
pin, which allows communication with low-level logic
included in digital FPGAs. The MAX3284E is available
in a 6-pin SOT23 package.
The MAX3284Es low-level logic application allows
users to set the logic levels. A logic high level of 1.65V
will limit the maximum data rate to 20Mbps.
±15kV ESD Protection
ESD-protection structures are incorporated on the
receiver input pins to protect against ESD encountered
during handling and assembly. The MAX3280E/
MAX3281E/MAX3283E/MAX3284E receiver inputs (A,
B) have extra protection against static electricity found
in normal operation. Maxims engineers developed
state-of-the-art structures to protect these pins against
±15kV ESD without damage. After an ESD event, this
family of parts continues working without latchup.
ESD protection can be tested in several ways. The
receiver inputs are characterized for protection to the
following:
±15kV using the Human Body Model
±6kV using the Contact Discharge method specified
in IEC 1000-4-2 (formerly IEC 801-2)
±12kV using the Air-Gap Discharge method speci-
fied in IEC 1000-4-2 (formerly IEC 801-2)
ESD Test Conditions
ESD performance depends on a number of conditions.
Contact Maxim for a reliability report that documents
test setup, methodology, and results.
Human Body Model
Figure 3a shows the Human Body Model, and Figure
3b shows the current waveform it generates when dis-
charged into a low impedance. This model consists of
a 100pF capacitor charged to the ESD voltage of inter-
est, which is then discharged into the device through a
1.5kresistor.
IEC 1000-4-2
Since January 1996, all equipment manufactured
and/or sold in the European community has been
required to meet the stringent IEC 1000-4-2 specifica-
tion. The IEC 1000-4-2 standard covers ESD testing
and performance of finished equipment; it does not
specifically refer to integrated circuits. The
MAX3280E/MAX3281E/MAX3283E/MAX3284E help
_______________________________________________________________________________________ 5

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MAX3280 arduino
±15kV ESD-Protected 52Mbps, 3V to 5.5V, SOT23
RS-485/RS-422 True Fail-Safe Receivers
Package Information (continued)
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 11
© 2002 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.

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