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PDF SP9316 Data sheet ( Hoja de datos )
| Número de pieza | SP9316 | |
| Descripción | 16Bit CMOS Multiplying DAC | |
| Fabricantes | Sipex | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de SP9316 (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
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Corporation
SIGNAL PROCESSING EXCELLENCE
SP9316
16–Bit CMOS Multiplying DAC
s High Stability with No Laser–Trimming
s 15–Bit Monotonicity over Temperature
s Single Power Supply Operation
s Upper/Lower Byte Input Registers
s 2– and 4–Quadrant Multiplication
s 60mW Power Dissipation
DESCRIPTION…
The SP9316 is a 16–bit, monolithic CMOS, multiplying digital-to-analog converter with two 8–bit
input registers for direct microprocessor interface. It offers two– and four–quadrant multiplying
capability with TTL/DTL and CMOS logic compatibility. Operating from a single +15V supply,
power dissipation is less than 60mW. The SP9316 is packaged in 24-pin ceramic or molded
plastic. Models are available for operation over the commercial (0°C to 70°C) and military (–55°C
to +125°C) temperature ranges. For product screened to MIL–STD–883, please consult the
factory.
LSB LATCH 19
CONTROL
REFERENCE 13
INPUT
MSB LATCH 20
CONTROL
BIT: 9 10 11 12 13 14 15 16 ANA GND +15V
4 3 2 1 24 23 22 21
INPUT REGISTER
PRECISION 16-BIT
RESISTOR NETWORK
& SWICHES
INPUT REGISTER
5 6 7 8 9 10 11 12
18 17
SP9316
5KΩ
BIT: 8 7 6 5 4 3 2 1(MSB)
15 IOUT2
16 IOUT1
14 FEEDBACK
Corporation
SIGNAL PROCESSING EXCELLENCE
181
1 page  
Individual latch controls are provided for the
high and low bytes which may be tied together
for a single 16-bit word update. The data is
latched with the strobe at logic 0. The latches are
level–triggered and can be made transparent by
tying them to logic 1. However, use of the
latches is recommended in most applications as
they significantly reduce data bit skew, which
affects the glitch performance.
Layout, Grounding and Guarding
16-bit system performance can be maintained
with suitable attention paid to the layout, ground-
ing and guarding techniques employed. All
grounds should be of as low resistance as pos-
sible. Analog and digital grounds should be
individually star-pointed and tied together as
close as possible to the SP9316. Good layout
techniques dictate that the high–speed digital
inputs should be kept separate from low–level
analog outputs. The DAC output and op amp
input are high impedance and so are sensitive to
interference from the digital input lines. Careful
pinout design of the SP9316 has reduced this
problem to a minimum, but guarding of these
points should be considered. Figures 3 and 4
detail the low impedance guard track layout.
Amplifier Selection
The SP9316 allows the designer to obtain the
optimum performance for each application. Se-
lection of the correct operational amplifier, and
the layout of the associated components are
critical to the success of the design. To obtain
the optimum linearity performance, the amplifi-
ers must have an open loop gain in excess of
100,000 or 100dB. Care should be taken to
VREF
400Ω
+15V
2R
BIT 1 (MSB)
DIGITAL
INPUT
BIT 16 (LSB)
MSB LATCH
LSB LATCH
13 17
0.01µF + 1µF
GND 18
RFB 14
SP9316
IOUT1 16
IOUT2 15
ROS1
_
A1
+
R
VO1
All "ones":
VOUT = –VREF + 1LSB
R for ±5V FS output
2R for ±10V FS output
ROS2
_
A2
+
VOUT
NOTE:
To maintain specified linearity, the external amplifiers (A1 and A2)
must be nulled. With a digital input of 10…0 and VREF set to zero —
1) set ROS1 for VO1 = 0V;
2) set ROS2 for VOUT = 0V;
3) set VREF to +10V and adjust RB for VOUT = 0V
Figure 2. Bipolar Operation
Binary Input
111…111
100…001
100…000
011…111
000…001
000…000
Analog Output
-V (1-2N)
REF
-V ( +2-N)
REF
-V ( )
REF
-V ( -2-N)
REF
-V (2-N)
REF
0
Table 1. Unipolar Transfer Function
ensure that the summing junction is as close to
analog ground as possible. Most applications
demand that the input offset be kept below
100µV. To maintain accuracy over temperature,
the amplifiers should have low bias currents and
offset voltage temperature coefficients.
In bipolar applications, attention must be paid to
the choice of resistors R and 2R (see figure 2).
As the analog voltage output increases from
zero to full-scale, the power dissipated by the
feedback resistor increases and the resistor heats
up. This causes a small change in the resistance
value which could lead to an alteration to the
transfer function, which may be seen as integral
linearity errors. The internal resistor network
has been designed using ultra-stable thin-film
nichrome. It is important that the temperature
coefficient of the external resistors match those
in the DAC as closely as possible. Resistors
with a temperature coefficient of 10ppm/°C or
better should be used.
LONG TERM DRIFT
When measuring the stability of the SP9316,
great care should be taken to ensure that the drift
of the measurement instruments can be sepa-
Offset Binary Input
111…111
100…001
100…000
011…111
000…001
000…000
Analog Output
-V (1-2 )-(N-1)
REF
-V (2 )-(N-1)
REF
0
V (2 )-(N-1)
REF
V (1-2 )-(N-1)
REF
V
REF
Table 2. Bipolar Transfer Function
Corporation
SIGNAL PROCESSING EXCELLENCE
185
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet SP9316.PDF ] | |
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