DataSheet.es    


PDF SP431 Data sheet ( Hoja de datos )

Número de pieza SP431
Descripción Serial I/O Filter
Fabricantes Intersil 
Logotipo Intersil Logotipo



Hay una vista previa y un enlace de descarga de SP431 (archivo pdf) en la parte inferior de esta página.


Total 17 Páginas

No Preview Available ! SP431 Hoja de datos, Descripción, Manual

Data Sheet
HSP43124
May 1999 File Number 3555.6
Serial I/O Filter
The Serial I/O Filter is a high performance filter engine that is
ideal for off loading the burden of filter processing from a
DSP microprocessor. It supports a variety of multistage filter
configurations based on a user programmable filter and fixed
coefficient halfband filters. These configurations include a
programmable FIR filter of up to 256 taps, a cascade of from
one to five halfband filters, or a cascade of halfband filters
followed by a programmable FIR. The half band filters each
decimate by a factor of two, and the FIR filter decimates from
one to eight. When all six filters are selected, a maximum
decimation of 256 is provided.
For digital tuning applications, a separate multiplier is
provided which allows the incoming data stream to be
multiplied, or mixed, by a user supplied mix factor. A two pin
interface is provided for serially loading the mix factor from
an external source or selecting the mix factor from an on-
board ROM. The on-board ROM contains samples of a
sinusoid capable of spectrally shifting the input data by one
quarter of the sample rate, FS/4. This allows the chip to
function as a digital down converter when the filter stages
are configured as a low-pass filter.
The serial interface for3- input and output data is compatible
with the serial ports of common DSP microprocessors.
Coefficients and configuration data are loaded over a
bidirectional eight bit interface.
Block Diagram
Features
• 45MHz Clock Rate
• 256 Tap Programmable FIR Filter
• 24-Bit Data, 32-Bit Coefficients
• Cascade of up to 5 Half Band Filters
• Decimation from 1 to 256
• Two Pin Interface for Down Conversion by FS/4
• Multiplier for Mixing or Scaling Input with an External
Source
• Serial I/O Compatible with Most DSP Microprocessors
Applications
• Low Cost FIR Filter
• Filter Co-Processor
• Digital Tuner
Ordering Information
PART NUMBER
HSP43124PC-45
HSP43124PC-33
TEMP.
RANGE (oC)
PACKAGE
0 to 70 28 Ld PDIP
0 to 70 28 Ld PDIP
HSP43124SC-45
HSP43124SC-33
HSP43124SI-40
0 to 70
0 to 70
-40 to 85
28 Ld SOIC
28 Ld SOIC
28 Ld SOIC
PKG.
NO.
E28.6
E28.6
M28.3
M28.3
M28.3
DIN
SCLK
SYNCIN
MXIN
SYNCMX
HALF
BAND
FILTER
#1
HALF
BAND
FILTER
#2
CONTROL
INTERFACE
HALF
BAND
FILTER
#5
DOUT
SYNCOUT
CLKOUT
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999

1 page




SP431 pdf
HSP43124
ADDRESS
000
001
010
011
100
101
110
111
TABLE 1. CONFIGURATION CONTROL REGISTER FUNCTIONAL DESCRIPTION
REGISTER DESCRIPTION
BIT
POSITIONS
BIT FUNCTION
Filter Configuration
2-0 Specifies the number of halfbands to use. Number ranges from 0 to 5. Other
values are invalid.
3 Filter Enable bit. 1 = Enable. 0 = Minimum filter bypass (either the FIR or
HBF must be enabled to get an output).
4 Coefficient read enable. When set to 1, enables reading and disables writing
of coefficient RAM. NOTE: This bit must be set to 0 prior to writing the
Coefficient RAM.
7-5 FIR Decimation Rate. Range is 1-8 (8 = 000).
Programmable FIR Filter Length
7-0 Number of Taps in the Programmable FIR Filter. For even or odd symmetric
filters, values range from 4- 256, 1 to 3 are invalid, and 0000000 = 256. For
asymmetric filters, the value loaded in this register must be two times the ac-
tual number of coefficients.
Coefficient RAM Access
7-0 Coefficient RAM is loaded by multiple writes to this address. (See Writing
Coefficients section for additional details.)
Input Format
4-0 Number of bits in input data word, from 8 (01000) to 24 (11000). Values out-
side the range of 8 - 24 are invalid.
5 Number System. 0 = Two’s Complement, 1 = Offset Binary.
6 Serial Format. 1 = MSB First, 0 = LSB First.
7 Unused
Output Timing
4-0 Number of FCLKS per CLKOUT. Range 1 to 32. (00000 = 32 FCLKS)
5 1 = MSB First, 0 = LSB First.
6-7 Unused
Output Format
4-0 Number of bits in output data word, from 8 to 32. A value of 32 is represented
by 00000, and values from 1 to 7 are invalid.
5 Round Select. 1 = Round to Selected Number of Bits, 0 = Truncate.
6 Number System. 0 = Two’s Complement, 1 = Offset Binary.
7 Gain Correction. 1 = Apply scale factor of 2 to data. 0 = No Scaling.
Filter Symmetry
1-0 00 = Even Symmetric FIR Coefficients
01 = Non-Symmetric Coefficients
10 = Odd Symmetric FIR
7-2 Reserved: Must be 0.
Mix Factor Format
4-0 Number of bits in mix factor, from 8 (01000) to 24 (11000). Values outside
the range of 8 - 24 are invalid.
5 Serial Format. 1 = MSB First, 0 = LSB First.
6 Mix Factor Select. 1 = Serial Input, 0 = Weaver modulator look-up-table.
7 Unused
Writing Coefficients
The HSP43124 provides a register bank to store filter
coefficients for configurations which use the programmable
filter. The register bank consists of 128 thirty-two-bit
registers. Each register is loaded by 4 one byte writes to the
bidirectional interface used for loading the configuration
registers. The coefficients are loaded in order from least
significant byte (LSB) to most significant byte (MSB).
The coefficient registers are loaded by first setting the
coefficient read enable bit to “0” (bit 4 of the Filter
Configuration Register). Next, coefficients are loaded by
setting the A2-0 address to 010 (binary) and writing one byte
at a time as shown in Figure 3. The down loaded bytes are
stored in a holding register until the 4th write cycle. On
completion of the fourth write cycle, the contents of the
holding register are loaded into the Coefficient RAM, and the
write pointer is incremented to the next register. If the user
attempts to write more than 128 coefficients, the pointer
5

5 Page





SP431 arduino
NORMALIZED
FREQUENCY
0.101562
0.109375
0.117188
0.125000
0.132812
0.140625
0.148438
0.156250
0.164062
0.171875
0.179688
0.187500
0.195312
0.203125
0.210938
0.218750
0.226562
0.234375
0.242188
0.250000
0.257812
0.265625
0.273438
0.281250
0.289062
0.296875
0.304688
0.312500
0.320312
0.328125
0.335938
0.343750
0.351562
0.359375
0.367188
0.375000
0.382812
0.390625
0.398438
0.406250
0.414062
0.421875
HSP43124
TABLE 3. FREQUENCY RESPONSE OF HALFBAND FILTERS (Continued)
HALFBAND
#1
HALFBAND
#2
HALFBAND
#3
HALFBAND
#4
-0.237843
-0.069457
-0.005963
-0.000815
-0.314663
-0.104701
-0.011924
-0.002208
-0.407509
-0.152566
-0.022368
-0.005313
-0.518045
-0.215834
-0.039695
-0.011613
-0.647925
-0.297499
-0.067100
-0.023435
-0.798791
-0.400727
-0.108640
-0.044186
-0.972266
-0.528809
-0.169262
-0.078552
-1.169959
-0.685131
-0.254777
-0.132639
-1.393465
-0.873129
-0.371785
-0.214009
-1.644372
-1.096269
-0.527552
-0.331613
-1.924262
-1.358019
-0.729872
-0.495620
-2.234728
-1.661842
-0.986908
-0.717181
-2.577375
-2.011181
-1.307047
-1.008144
-2.953834
-2.409468
-1.698769
-1.380771
-3.365774
-2.860128
-2.170548
-1.847495
-3.814917
-3.366593
-2.730783
-2.420719
-4.303048
-3.932319
-3.387764
-3.112694
-4.832037
-4.560817
-4.149669
-3.935463
-5.403856
-5.255675
-5.024594
-4.900864
-6.020599
-6.020600
-6.020600
-6.020600
-6.684504
-6.859450
-7.145791
-7.306352
-7.397981
-7.776287
-8.408404
-8.769932
-8.163642
-8.775419
-9.816921
-10.423476
-8.984339
-9.861469
-11.380193
-12.279667
-9.863195
-11.039433
-13.107586
-14.352002
-10.803663
-12.314765
-15.009147
-16.655094
-11.809574
-13.693460
-17.095793
-19.205034
-12.885208
-15.182171
-19.379534
-22.019831
-14.035372
-16.788332
-21.873730
-25.119940
-15.265501
-18.520315
-24.593418
-28.528942
-16.581776
-20.387625
-27.555685
-32.274414
-17.991278
-22.401131
-30.780161
-36.389088
-19.502172
-24.573368
-34.289623
-40.912403
-21.123947
-26.918915
-38.110786
-45.892738
-22.867725
-29.454887
-42.275345
-51.390583
-24.746664
-32.201569
-46.821358
-57.483341
-26.776485
-35.183285
-51.795181
-64.272881
-28.976198
-38.429543
-57.254162
-71.898048
-31.369083
-41.976673
-63.270584
-80.556969
-33.984089
-45.870125
-69.937607
-90.550629
-36.857830
-50.167850
-77.378593
-102.379677
-40.037594
-54.945438
-85.762718
-117.007339
11
HALFBAND
#5
-0.000000
-0.000000
-0.000000
-0.000000
-0.000031
-0.000287
-0.001468
-0.005427
-0.016180
-0.041152
-0.092409
-0.187497
-0.349593
-0.606862
-0.991193
-1.536664
-2.278126
-3.250174
-4.486639
-6.020600
-7.884833
-10.112627
-12.738912
-15.801714
-19.344007
-23.416153
-28.079247
-33.409992
-39.508194
-46.509052
-54.604954
-64.087959
-75.444221
-89.610390
-108.973686
-152.503693
-153.443375
-158.914017
-156.960175
-153.317627
-161.115540
-153.504684

11 Page







PáginasTotal 17 Páginas
PDF Descargar[ Datasheet SP431.PDF ]




Hoja de datos destacado

Número de piezaDescripciónFabricantes
SP43SMD Power InductorsYue Fat
Yue Fat
SP431High Voltage Adjustable Precision Shunt RegulatorsSYNC POWER
SYNC POWER
SP431Serial I/O FilterIntersil
Intersil
SP431Dual FIR FilterIntersil
Intersil

Número de piezaDescripciónFabricantes
SLA6805M

High Voltage 3 phase Motor Driver IC.

Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


DataSheet.es    |   2020   |  Privacy Policy  |  Contacto  |  Buscar