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PDF SP3483 Data sheet ( Hoja de datos )
| Número de pieza | SP3483 | |
| Descripción | +3.3V Low Power Slew Rate Limited Half-Duplex RS-485 Transceiver | |
| Fabricantes | Sipex | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de SP3483 (archivo pdf) en la parte inferior de esta página. Total 9 Páginas | ||
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®
SP3483
+3.3V Low Power Slew Rate Limited
Half-Duplex RS-485 Transceiver
s RS-485 and RS-422 Transceiver
s Operates from a single +3.3V supply
s Interoperable with +5.0V logic
s Driver/Receiver Enable
s Low Power Shutdown Mode
s -7V to +12V Common-Mode Input
Voltage Range
s Allows up to 32 transceivers on
the serial bus
s Compatibility with the industry
standard 75176 pinout
s Driver Output Short-Circuit Protection
s Slew Rate Limited Driver for Low EMI
(SP3483)
DESCRIPTION
The SP3483 device is part of a family of +3.3V low power half-duplex transceivers that meet
the specifications of the RS-485 and RS-422 serial protocols. This device is pin-to-pin
compatible with the Sipex SP483 device as well as popular industry standards. The SP3483
features Sipex's BiCMOS process, allowing low power operation without sacrificing
performance. The SP3483 is internally slew rate limited to reduce EMI and can meet the
requirements of RS-485 and RS-422 up to 250kbps.
SP3483 DS/04
RO 1
RE 2
DE 3
DI 4
R
D
8 Vcc
7B
6A
5 GND
SP3483
SP3483 Low Power Slew Rate Limited Half-Duplex RS485 Transceivers
1
© Copyright 2000 Sipex Corporation
1 page  
D
VCC
R
VOD
R VOC
Figure 1. Driver DC Test Load Circuit
GENERATOR
(NOTE 1)
D
50Ω
VCC
CL
RL =
60Ω
OUT
CL = 15pF (NOTE 2)
Figure 3. Driver Differential Output Delay and Transition
Time Circuit
VDM
GENERATOR
(NOTE 1)
D
50Ω
VCC
S1
RL = 27Ω
OUT
CL = 15pF
(NOTE 2)
VOM =
VOH + VOL
2
1.5V
Figure 2. Driver Propagation Delay Test Circuit
GENERATOR
(NOTE 1)
S1
D
CL = 50pF
(NOTE 2)
50Ω
OUT
RL = 110Ω
VOM =
VOH + VOL
2
1.5V
Figure 4. Driver Enable and Disable Timing Circuit,
Output HIGH
S1
0V OR 3V
D
GENERATOR
(NOTE 1)
CL = 50pF
(NOTE 2)
50Ω
VCC
RL = 110Ω
OUT
Figure 5. Driver Enable and Disable Timing Circuit,
Output LOW
GENERATOR
(NOTE 1)
50Ω
VID R
OUT
CL = 15pF
(NOTE 2)
1.5V
0V
VOM = VCC
2
Figure 6. Receiver Propagation Delay Test Circuit
1.5V
-1.5V
S3
VID R
GENERATOR
(NOTE 1)
50Ω
1k
CL = 15pF
(NOTE 2)
S1
VCC
S2
Figure 7. Receiver Enable and Disable Timing Circuit
INPUTS
OUTPUTS
INPUTS
OUTPUTS
LINE
RE DE DI CONDITION
X 1 1 No Fault
X 1 0 No Fault
X0X
X
Table 1. Transmit Function Truth Table
B
0
1
Z
A
1
0
Z
RE DE
A-B
0 0 +0.2V
0 0 -0.2V
0 0 Inputs Open
10
X
Table 2. Receive Function Truth Table
R
1
0
1
Z
SP3483 DS/04
SP3483 Low Power Slew Rate Limited Half-Duplex RS485 Transceivers
© Copyright 2000 Sipex Corporation
5
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet SP3483.PDF ] | |
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