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PDF TM58P10 Data sheet ( Hoja de datos )

Número de pieza TM58P10
Descripción 8 Bit Microcontroller
Fabricantes Tenx Technology 
Logotipo Tenx Technology Logotipo



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No Preview Available ! TM58P10 Hoja de datos, Descripción, Manual

Total page
Doc No
Rev.
25
DS-TM58P10
1.2
文件名稱 TM58P10 8 Bit Microcontroller Data Sheet
版次 生效日 ECN No. 制修訂者
修訂內容概要
1.2 2004/1/9 EN-DS-03-12011
曾正智
p.1 移除 internal RC oscillator
p.2 Pin Assignment
p.2 EXT_CLK 改為 RTCC
p.2 工作電壓下限由 2.5V 改為 2.2V
p.3 weak 改成 wake
p.3 PA0: I/O
IAR; Status register; BSR
p.3 EXT_CLK 改成 RTCC
p.4 PB7~0, PA3~0
p.4 FSR 改為 BSR
p.4 EXT_CLK 改成 RTCC, Option 改為 Select
p.6 LV1~LV2, 低電壓偵測改為 2
p.7 統一名稱: configuration, BSR,
direct and indirect
p.9 TM58P10 的指令與操作模式無關.
“lcall” and “lgoto”也適用於 general mode
p.9 EXT_CLK 改成 RTCC
p.11 BSR 內容更改
p.11 MCLR 改為 RESETB, Wake 改為 WDT
p.11 RESERB reset 改為 Input a “low”…..
p.13 修改 Fig 5-8, 內容修改. Address 30~3F 無效.
p.15 External interrupt enable 改成 TMR0
interrupt enable
p.15 External interrupt flag 改成 TMR0
interrupt flag
p.16 新增 Key_Debounce 範例
p.17 EXT_CLK 改成 RTCC
p.18 新增 prescaler from TMR0 to WDT 範例
p.18 新增 prescaler from WDT to TMR0 範例
p.19 Synchronize by ripple cpunter 改為 counter.
p.20 BSR 的初值修改,2 個無用的位元,其預設值
microchip 不同.已經新增 BSR
application note.
p.21 Select register 只有 6 位元
p.24 工作電壓下限由 2.5V 改為 2.2V
p.24 Operating Temperature 改成 0℃~70
p.25 NS 的單位應為 Mhz,下限改為 0.2
p.25 TWDT, TRHT 20~30ms
*第一次轉入

1 page




TM58P10 pdf
4. System Block Diagram
Interrupt
Controller
TM58P10
Instruction
Register
EPROM
PB7~0
PA3~0
PB7:PB0
I/O Port
PA3:PA0
TMR0
Select
Register
WDT/TMR0
Prescaler
Instruction
Decoder
Data Bus
Status
Acc
Program
Counter
4 Level
stacks
BSR
ALU and Control Unit 33 bytes RAM
Watch Dog
Timer
Oscillator & Low
voltage detector
Configuration
Word
RTCC
Sleep
i OSC1 OSC2 RESETB/VPP
4 tenx technology, inc.
Rev1.2 2004/1/9

5 Page





TM58P10 arduino
TM58P10
Bit Symbol
Description
Carry and Borrow bit
ADD instruction
SUB instruction
0C
1: a carry occurred from the MSB 1: no borrow (Note1)
0: no carry
0: a borrow occurred from the MSB
Nibble Carry and Nibble Borrow bit
ADD instruction
SUB instruction
1 DC 1: a carry from the low nibble bits 1: no borrow
of the result occurred
0: a borrow from the low nibble bits
0: no carry
of the result occurred
Zero bit:
2Z
1: the result of a logic operation is zero
0: the result of a logic operation is not zero
Power down flag bit: (Note2)
3 PD
1: after power-on or by the CLRWDT instruction
0: execute SLEEP instruction
Time out flag bit:
4 TO
1: after power-on or by the CLRWDT or SLEEP instruction
0: Occur WDT time-overflow
Page Location
5 SA0
0
1
Page0 (000H~1FFH)
Page1 (200H~3FFH)
Figure 5-5 Status Register
Note1: A SUB instruction is executed by adding the 2’s complement of the subtrahend, so
C = 1 represents positive result. The Figure 5-5-1 show the relation between C-bit
and borrow.
10 tenx technology, inc.
Rev1.2 2004/1/9

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