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PDF MN662747RPH Data sheet ( Hoja de datos )
| Número de pieza | MN662747RPH | |
| Descripción | Signal Processing LSI for CD Players | |
| Fabricantes | Panasonic | |
| Logotipo |  |
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For Audio Equipment
MN662747RPH
Signal Processing LSI for CD Players
Overview
The MN662747RPH is a CD signal processing LSI that,
on a single chip, combines optics servos for the CD player
(focus, tracking, and traverse servos), digital signal
processing (EFM demodulation and error correction),
digital servo processing for the spindle motor, digital
filter, and D/A converter, so thus covers all signal
processing functions from the head's RF amplifier onward.
Features
(Optics servo)
Focus, tracking, and traverse servos
Automatic adjustment functions for FO/TR gain,
FO/TR offset, and FO/TR balance
Built-in D/A converter for drive voltage output
Built-in dropout countermeasures
Anti-shock functions
Built-in track cross counter
Traverse speed detection function
(Digital Signal Processing)
Built-in DSL and PLL
Frame synchronization detection, holding, and
insertion
Subcode data processing
Subcode Q data CRC check
Built-in subcode Q data register
CIRC error detection and correction
C1 decoder: duplex error correction
C2 decoder: triplex error correction
Built-in 16-K bits of RAM for use in de-
interleaving
Audio data interpolation
Averaging or retention of previous values
Digital attenuation (–12 dB)
Audio data peak level detection function
Digital audio interface (EIAJ format)
Audio data serial interface for input and output
(Audio circuits)
Digital filter using 8-fold oversampling
Built-in D/A converter (1-bit D/A converter)
Built-in differential operational amplifier (secondary
low pass filter)
(Other)
Built-in playback pitch control function (normal
speed only) (±13%)
Support for quadruple-speed playback (digital servo
and signal processing block only)
Built-in support for jitter-free disc rotation synchro-
nization playback
Oscillator shutdown mode
Power management mode
Operating voltage 4.5 to 5.5 V
Applications
CD players
(Spindle Motor Servo)
CLV digital servo
Switchable servo gain
1 page  
For Audio Equipment
MN662747RPH
Pin Descriptions (continued)
Pin No. Symbol
33 TE
I/O
I
Function Description
Tracking error signal input.
(analog input)
34 RFENV I
RF envelope signal input.
(analog input)
35 VDET I Vibration detection signal input.
"H" level: vibration detected.
36 OFT I Offtrack signal input.
"H" level: offtrack.
37 TRCRS I
Track cross signal input.
(analog input)
38 RFDET I
RF detection signal input.
"L" level: detected.
39 BDO I Dropout signal input.
"H" level: dropout.
40
LDON
O
Laser ON signal output.
"H" level: ON.
41 PLLF2 I/O PLL loop filter characteristic selection pin.
42
PLAY
O
Play signal output.
"H" level: play.
43
WVEL
O
Double-speed status signal output.
"H" level: double-speed.
44 ARF I RF signal input.
45 IREF I Reference current input pin.
46 DRF I DSL bias pin.
47 DSLF I/O DSL loop filter pin.
48 PLLF I/O PLL loop filter pin.
49 VCOF I/O VCO loop filter pin.
50 AVDD2 I Power supply for analog circuits (DSL, PLL, D/A converter output, and A/D
converter).
51 AVSS2 I Ground for analog circuits (DSL, PLL, D/A converter output, and A/D
converter).
52
EFM
O EFM signal output. EFM output when IOSEL is "H" level.
or CK384
•Crystal oscillator 16.9344-MHz clock output when I
•OSEL is "L" level.
•384 fs output from signal processing block. (During
variable-pitch operation, this is the VCO clock.)
Commands permit switching among the above three outputs.
53 PCK O PLL derived clock or DSL balance output. fPCK =4.3218 MHz.
or DSLB
54
VCOF2 I/O
VCO loop filter pin.
55
SUBC
O
Subcode serial output.
56 SBCK I Serial clock input for subcode serial output.
57 VSS I Ground for oscillator circuit.
58 X1 I Crystal oscillator circuit input/output pins. f=16.9344 MHz, 33.8688 MHz.
59 X2 O Crystal oscillator circuit output/output pins. f=16.9344 MHz, 33.8688 MHz.
60 VDD I
BYTCK or
61 O
TRVSTOP
Oscillator circuit power supply.
When IOSEL is "H" level, byte clock signal output.
When IOSEL is "L" level, traverse stop signal output. "H" level: stop mode.
62
CLDCK
O
63
FCLK
O
64 IPFLAG O
Subcode frame clock signal output pin. (fCLDCK=7.35 kHz)
Crystal frame clock signal output. (fFCLK=7.35 kHz)
Interpolation flag signal output. "H" level: interpolation.
65
FLAG
O
Flag signal output.
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet MN662747RPH.PDF ] | |
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