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PDF LTC1434CGN Data sheet ( Hoja de datos )
| Número de pieza | LTC1434CGN | |
| Descripción | 450mA/ Low Noise Current Mode Step-Down DC/DC Converters | |
| Fabricantes | Linear Technology | |
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FEATURES
s High Efficiency: Up to 93%
s Constant Frequency Adaptive PowerTM Operation
s Input Voltage Range: 3V to 13.5V
s Internal 0.6Ω Power Switch (VIN = 10V)
s Low Dropout Operation: 100% Duty Cycle
s Low-Battery Detector
s Internal Power-On Reset Timer
s Current Mode Operation for Excellent Line and Load
Transient Response
s Low Quiescent Current: 470µA
s Shutdown Mode Draws Only 15µA Supply Current
s ±1% Reference Accuracy
s Available in 16- and 20-Lead Narrow SSOP
U
APPLICATIONS
s Cellular Telephones
s Portable Instruments
s Wireless Modems
s RF Communications
s Distributed Power Systems
s Scanners
s Battery-Powered Equipment
, LTC and LT are registered trademarks of Linear Technology Corporation.
Adaptive Power is a trademark of Linear Technology Corporation.
LTC1433/LTC1434
450mA, Low Noise
Current Mode Step-Down
DC/DC Converters
DESCRIPTION
The LTC®1433/LTC1434 are monolithic pulse width modu-
lated step-down DC/DC converters. By utilizing current
mode switching techniques, they provide excellent AC and
DC load and line regulation. Both devices operate at a fixed
frequency with the LTC1434 phase-lockable to an external
clock signal.
Both devices incorporate two internal P-channel power
MOSFETs with a parallel combined resistance of 0.6Ω (at
a supply of 10V). The Adaptive Power output stage selec-
tively drives one or both of the switches at frequencies up
to 700kHz to reduce switching losses and maintain high
efficiencies at low output currents.
The LTC1433/LTC1434 are capable of supplying up to
450mA of output current and boasts a ±2.4% output
voltage accuracy. An internal low-battery detector has the
same level of accuracy as the output voltage. A power-on
reset timer (POR) is included which generates a signal
delayed by 65536/fCLK (300ms typ) after the output is
within 5% of the regulated output voltage.
Ideal for current sensitive applications, the devices draw
only 470µA of quiescent current. In shutdown the devices
draw a mere 15µA. To further maximize the life of the
battery source, the internal P-channel MOSFET switch is
turned on continuously in dropout.
TYPICAL APPLICATION
68µF**
0.1µF 20V
VOUT
3.3V
L1
100µH
+ 100µF*
10V
D1
0.1µF
1
SSW
2
NC
16
PWRVIN
PGND 15
3 14
BSW
SVIN
4 LTC1433 13
NC COSC
5 12
SGND
POR
6
RUN/SS
7
LBO
8
LBI
ITH
VOSENSE
VPROG
11
10
9
VIN
3.5V TO 12V
10k
POWER-ON
RESET
5.1k 680pF
47pF
6800pF
D1: MOTOROLA MBRS130LT3 *AVX TPSD107M010R0100
L1: COILCRAFT D03316-104 ** AVX TPSE686M020R0150
Figure 1. High Efficiency Step-Down Converter
1433/34 F01
LTC1433 Efficiency for
VOUT = 3.3V
100
90 VIN = 5V
80 VIN = 12V
70
VIN = 9V
60
50
40
0.001
0.01 0.1
LOAD CURRENT (A)
1
1433/34 TA01
1
1 page  
LTC1433/LTC1434
PIN FUNCTIONS (LTC1433/LTC1434)
SSW (Pin 1/Pin 2): Drain of the Small P-Channel MOSFET
Switch.
BSW (Pin 3/Pin 4): Drain of the Large P-Channel MOSFET
Switch.
SGND (Pin 5): Small-Signal Ground. Must be routed
separately from other grounds to the (–) terminal of COUT.
RUN/SS (Pin 6/Pin 7): Combination of Soft Start and Run
Control Inputs. A capacitor to ground at this pin sets the
ramp time to full current output. The time is approxi-
mately 0.5s/µF. Forcing this pin below 1.3V causes all
circuitry to be shut down except the low-battery com-
parator. For input voltages above 6V this pin is clamped by
a 6V Zener (see Functional Diagram). Applying voltages
greater than 6V to this pin will cause additional current to
flow into this pin.
LBO (Pin 7/Pin 9): Open-Drain Output of an N-Channel
Pull-Down. This pin will sink current when LBI goes below
1.19V.
LBI (Pin 8/Pin 10): The (+) Input of the Low-Battery
Voltage Comparator. The (–) input is connected to the
1.19V reference. When LBI is grounded along with RUN/
SS, this comparator will shut down along with the rest of
the control circuitry. LBO will go to high impedance.
VPROG (Pin 9/Pin 11): The voltage at this pin selects the
output voltage. When VPROG = 0V or VPROG = VIN, the
output is set to 3.3V and 5V respectively, with VOSENSE
connected to the output. Leaving VPROG open (DC) allows
the output voltage to be set by an external resistive divider.
VOSENSE is then connected to the common node of the
resistive divider.
VOSENSE (Pin 10/Pin 12): This pin receives the feedback
voltage either from the output or from an external resistive
divider across the output. The VPROG pin determines at
which point VOSENSE must be connected.
VPROG = 0V
VPROG = VIN
VPROG = Open (DC)
VOUT = 3.3V
VOUT = 5V
VOUT = Adjustable
ITH (Pin 11/Pin 13): Error Amplifier Compensation Point.
The current comparator threshold increases with this
control voltage. Nominal voltage range for this pin is 0V
to 2.4V.
POR (Pin 12/Pin 14): Open-Drain Output of an N-Chan-
nel Pull-Down. This pin sinks current when the output
voltage is 7.5% out of regulation. When the output rises
to – 5% of its regulated value, the pin goes into high
impedance after 216 (65536) oscillator cycles. The POR
output is asserted when the device is in shutdown,
independent of VOUT.
COSC (Pin 13/Pin 15): External capacitor connects be-
tween this pin and ground to set the operating frequency.
PLL LPF (Pin 16 LTC1434): Output of the Phase Detector
and Control Input of the Oscillator. Normally a series RC
lowpass network is connected from this pin to ground. Tie
this pin to SGND in applications which do not use the
phase-locked loop. Can be driven by a 0V to 2.4V logic
signal for a frequency shifting option.
PLLIN (Pin 17 LTC1434): External Synchronizing Input to
the Phase Detector. This pin is internally terminated to
SGND with 50kΩ. Tie this pin to SGND in applications
which do not use the phase-locked loop.
SVIN (Pin 14/Pin 18): Main Supply for All the Control
Circuitry.
PGND (Pin 15/Pin 19): Switch Driver Ground. Connects to
the (–) terminal of CIN. Anode of the Schottky diode must
be connected close to this pin.
PWRVIN (Pin 16/Pin 20): Supply for the Internal Power
MOSFETs and Switch Drivers. Must decouple this pin
properly to ground.
NC (Pins 2, 4,/Pins 1, 3, 6, 8): No Connection.
5
5 Page 
LTC1433/LTC1434
APPLICATIONS INFORMATION
Power-On Reset Function (POR)
The power-on reset function monitors the output voltage
and turns on an open-drain device when it is out of
regulation. An external pull-up resistor is required on the
POR pin.
When power is first applied or when coming out of
shutdown, the POR output is pulled to ground. When the
output voltage rises above a level which is 5% below the
regulated output value, an internal counter starts. After
counting 216 (65536) clock cycles the POR pull-down
device turns off.
The POR output will go low whenever the output voltage
drops below 7.5% of its regulated value for longer than
approximately 30µs, signaling an out-of-regulation condi-
tion. In shutdown the POR output is pulled low even if the
regulator’s output is held up by an external source.
Run/Soft Start Function
The RUN/SS pin is a dual purpose pin which provides the
soft start function and a means to shut down the LTC1433/
LTC1434. Soft start reduces input surge currents by
providing a gradual ramp-up of the internal current limit.
Power supply sequencing can also be accomplished using
this pin.
An internal 3µA current source charges up an external
capacitor CSS.When the voltage on RUN/SS reaches 1.3V
the LTC1433/LTC1434 begins operating. As the voltage
on RUN/SS continues to ramp from 1.3V to 2.4V the
internal current limit is also ramped at a proportional
linear rate. The current limit begins at approximately
350mA (at VRUN/SS = 1.3V) and ends at 1.2A (VRUN/SS =
2.4V). The output voltage thus ramps up slowly, charging
the output capacitor while input surge currents are re-
duced. If RUN/SS has been pulled all the way to ground
there is a delay of approximately 0.5s/µF before starting,
followed by a like time to reach full current.
tDELAY = 5(105)CSS seconds
By pulling the RUN/SS pin below 1.3V, the LTC1433/
LTC1434 are put in low current shutdown. This pin can be
driven directly from logic as shown in Figure 8. Diode D1
in Figure 8 reduces the start delay but allows CSS to ramp
up slowly providing the soft start function. This diode can
be deleted if soft start is not needed. The RUN/SS pin has
an internal 6V Zener clamping the voltage on this pin (see
Functional Diagram).
RUN/SS
D1
RUN/SS
CSS
Figure 8. RUN/SS Pin Interfacing
CSS
1433/34 F08
Phase-Locked Loop and Frequency Synchronization
The LTC1434 has an internal voltage-controlled oscilla-
tor and phase detector comprising a phase-locked loop.
This allows the MOSFET turn-on to be locked to the rising
edge of an external source. The frequency range of the
voltage-controlled oscillator is ±30% around the center
frequency fO. The value of COSC is calculated from the
desired operating frequency (fO) with the following
expression (assuming the phase-locked loop is locked,
i.e VPLL LPF = 1.19V):
( ) ( )COSC
pF
=
2.06104
Frequency kHz
– 11
Instead of using the above expression, Figure 2 graphi-
cally shows the relationship between the oscillator fre-
quency and the value of COSC under various voltage
conditions at the PLL LPF pin.
The phase detector used is an edge sensitive digital type
which provides zero degrees phase shift between the
external and internal oscillators. This type of phase detector
will not lock up on input frequencies close to the harmonics
of the VCO center frequency. The PLL hold-in range ∆ fH is
equal to the capture range, ∆fH = ∆fC = ±0.3fO.
The output of the phase detector is a pair of complemen-
tary current sources charging or discharging the external
filter network on the PLL LPF pin. The relationship
between the voltage on the PLL LPF pin and operating
frequency is shown in Figure 9. A simplified block diagram
is shown in Figure 10.
11
11 Page | ||
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| PDF Descargar | [ Datasheet LTC1434CGN.PDF ] | |
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